1. 18 12月, 2014 2 次提交
  2. 12 12月, 2014 1 次提交
  3. 05 12月, 2014 1 次提交
  4. 19 11月, 2014 1 次提交
  5. 13 11月, 2014 2 次提交
  6. 12 11月, 2014 1 次提交
  7. 10 11月, 2014 1 次提交
  8. 08 11月, 2014 1 次提交
  9. 20 10月, 2014 1 次提交
  10. 02 6月, 2014 1 次提交
  11. 22 5月, 2014 9 次提交
  12. 31 10月, 2013 1 次提交
  13. 23 8月, 2013 1 次提交
    • W
      i2c: move OF helpers into the core · 687b81d0
      Wolfram Sang 提交于
      I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
      that it is much cleaner to have this in the core. This also removes a
      circular dependency between the helpers and the core, and so we can
      finally register child nodes in the core instead of doing this manually
      in each driver. So, fix the drivers and documentation, too.
      Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      687b81d0
  14. 20 8月, 2013 1 次提交
  15. 11 2月, 2013 4 次提交
  16. 23 12月, 2012 1 次提交
  17. 16 11月, 2012 4 次提交
    • S
      i2c: i2c-sh_mobile: fix spurious transfer request timed out · 29fb08c3
      Shinya Kuribayashi 提交于
      Ensure that any of preceding register write operations to the I2C
      hardware block reached the module, and the write data is reflected
      in the registers, before leaving the interrupt handler.
      
      Otherwise, we'll suffer from spurious WAIT interrupts that lead to
      'Transfer request timed out' message, and the transaction failed.
      Reported-by: NTeppei Kamijou <teppei.kamijou.yb@renesas.com>
      Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      29fb08c3
    • S
      i2c: i2c-sh_mobile: support I2C hardware block with a faster operating clock · ebd5ac16
      Shinya Kuribayashi 提交于
      On newer SH-/R-Mobile SoCs, a clock supply to the I2C hardware block,
      which is used to generate the SCL clock output, is getting faster than
      before, while on the other hand, the SCL clock control registers, ICCH
      and ICCL, stay unchanged in 9-bit-wide (8+1).
      
      On such silicons, the internal SCL clock counter gets incremented every
      2 clocks of the operating clock.
      
      This patch makes it configurable through platform data.
      Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      ebd5ac16
    • S
      i2c: i2c-sh_mobile: optimize ICCH/ICCL values according to I2C bus speed · 23a61291
      Shinya Kuribayashi 提交于
      ICCH/ICCL values is supposed to be calculated/optimized to strictly meet
      the timing specs required by the I2C standard. The resulting I2C bus
      speed does not matter at all, if it's less than 100 or 400 kHz.
      
      With this change, sh_mobile_i2c_icch() is virtually identical to
      sh_mobile_i2c_iccl(), but they're providing good descriptions of
      SH-/R-Mobile I2C hardware spec, and I'd leave them as separated.
      
      Also fix a typo in the comment, print icch/iccl values at probe, etc.
      Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
      
      [wsa: squashed two patches for bisectability]
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      23a61291
    • S
      i2c: i2c-sh_mobile: calculate clock parameters at driver probing time · 7b0e6292
      Shinya Kuribayashi 提交于
      Currently SCL clock parameters (ICCH/ICCL) are calculated in
      activate_ch(), which gets called every time sh_mobile_i2c_xfer() is
      processed, while each I2C bus speed is system-defined and in general
      those parameters do not have to be updated over I2C transactions.
      
      The only reason I could see having it transaction-time is to adjust
      ICCH/ICCL values according to the operating frequency of the I2C
      hardware block, in the face of DFS (Dynamic Frequency Scaling).
      
      However, this won't be necessary.
      
      The operating frequency of the I2C hardware block can change _even_
      in the middle of I2C transactions.  There is no way to prevent it
      from happening, and I2C hardware block can work with such dynamic
      frequency change, of course.
      
      Another is that ICCH/ICCL clock parameters optimized for the faster
      operating frequency, can also be applied to the slower operating
      frequency, as long as slave devices work.  However, the converse is
      not true.  It would violate SCL timing specs of the I2C standard.
      
      What we can do now is to calculate the ICCH/ICCL clock parameters
      according to the fastest operating clock of the I2C hardware block.
      And if that's the case, that calculation should be done just once
      at driver-module-init time.
      
      This patch moves ICCH/ICCL calculating part from activate_ch() into
      sh_mobile_i2c_init(), and call it from sh_mobile_i2c_probe().
      
      Note that sh_mobile_i2c_init() just prepares clock parameters using
      the clock rate and platform data provided, but does _not_ make any
      hardware I/O accesses.  We don't have to care about run-time PM
      maintenance here.
      Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
      Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
      7b0e6292
  18. 12 5月, 2012 1 次提交
  19. 29 10月, 2011 1 次提交
  20. 11 5月, 2011 2 次提交
  21. 18 4月, 2011 1 次提交
  22. 04 8月, 2010 1 次提交
  23. 07 4月, 2010 1 次提交