Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

During a reset, rx buffers are flushed after rx has been disabled. To avoid
race conditions, rx needs to stay disabled during the reset, so avoid any
calls to ath9k_hw_rxena in that case.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

When starting the AP beacon timer, it assumes that the TSF has recently
been cleared. Set the SC_OP_TSF_RESET flag to ensure that this is always
the case.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The interrupt handler increases the interrupt disable refcount, so the
tasklet needs to always call ath9k_hw_enable_interrupts.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

in ath_pci_resume it seems we are not enabling LED properly, in addition
we have a PS wrapper fix for this
Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

now the LED starts working for AR946/8x chipsets

Cc: "Balasubramanian, senthilkumar" <senthilb@qca.qualcomm.com>
Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

AR9003 seems to have issues sometimes with fast channel change
in 5GHz and this case is handled specifically for AR9280 by doing
a full reset. Let's do a full reset for 5GHz channles of AR9380
& for all channels of AR9280 pci chips.
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Move the register macros to appropriate header files to be in
sync with other register definitions and also a single place
to refer everything.
Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This patch adds support for AR946/8x chipets.
Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Split tx/rx gain table initval hanlding part so readability
is better and easy to manage the code.
Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Add initvals and register modifications required to support AR946/8x chipsets.
Signed-off-by: NSenthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The commit "ath9k_hw: Fix Tx IQ Calibration hang issue in
AR9003 chips" did not consider more than one potential sample
while calculating magnitude/phase average if more than one
sample has the same value which could affect post-processing
of outlier detection that causes an undesirable Tx IQ
correction value will be assigned to tx gain settings where
outlier happens.

Cc: Kai Shi <kaishi@qca.qualcomm.com>
Reported-by: NPaul Stewart <pstew@google.com>
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NPaul Stewart <pstew@google.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This patch protects cycle counters access by cc_lock
and also prints current sample index.
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Currently the samples debugfs which maintains the snapshorts of
mac/bb only on associated state. Hence to cover issues on idle
state, the samples are taken whenever the driver is ready.
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

On MIMO chips this can be used to enable/disable hardware chains, ensuring
that the MCS information is updated accordingly.
On non-MIMO chips with rx diversity (e.g. 9285), this configures the rx
input antenna.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

reduces unnecessary code duplication. Also takes the sc_pcu_lock within
ath_reset instead of callsites, which makes it possible to always cancel
all queued work items before the reset, possibly fixing a few race
conditions (work items vs reset) along with it.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This makes it much easier to add further rework to avoid race conditions
between reset and other work items.
Move other functions to make ath_reset static.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Helps with making ath_reset static in the next commit
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

we already have ah->{rx,tx}chainmask for the same purpose
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

In commit 9c204b46
(ath9k_hw: do not limit initial tx power to 20 dbm),
setting of txpower was broken.

This patch fixes it by initializing reg_pwr from the new
power limit, not the previous value.
Signed-off-by: NBill Jordan <bjordan@rajant.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Rx latecy to start signal(usec) of 11a is 41 not 37 and
also corrected the rx delay in quarter rate.
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The commit "ath9k_hw: Fix exceed transmission burst-time of 5GHz" added
a padding of 60 delimiters on the first subframe to work around an issue
on AR9380, but it lacked the checks to prevent it from being applied to
pre-AR9380, enterprise AR9380 or AR9580+
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The previous register used in these initvals was probably accidentally
copied over from the AR9100 values.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

It was used for the defunct 'turbo' mode which was never implemented in the
driver. Saves ~7.5k uncompressed
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

It is only used to workaround interoperability issues related to longer
delays in receiving the block ack, so it is not necessary to apply it
to the CTS exchange.
Should improve throughput slightly, especially when there are lots
of retransmissions.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

With sequence number and buffer allocation deferred to when they're needed
for the first time, it becomes much easier to start dropping packets from
the tid queue if necessary, e.g. when latency suddenly increases. This can
lead to some future improvements in buffer management for better latency.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

It is only necessary for BAW tracking and moving it to the ath_buf
makes it easier to add further improvements, such as deferring
seqno allocation in the aggregation path.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Use a sk_buff_head instead containing skbs instead of a list_head
containing ath_bufs. This makes it easier to decouple the aggregation
code from the ath_buf struct
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This saves some space in struct ath_frame_info
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Smatch shows the following warnings:

  CHECK   drivers/net/wireless/ath/ath9k/htc_drv_main.c
drivers/net/wireless/ath/ath9k/htc_drv_main.c +1315 ath9k_htc_configure_filter(27) warn: inconsistent returns mutex:&priv->mutex: locked (1303) unlocked (1315)

  CHECK   drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +3321 ar9300_eeprom_restore_internal(20) warn: returning -1 instead of -ENOMEM is sloppy
Signed-off-by: NLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This patch keep track of number of samples that includes
DMA debugs registers, PCU observe, CR, channel noise,
cycle conters, noisefloor history buffer and last N number
of tx and rx descriptor status. These samples are grouped
in table manner which dumping in debgufs.

Debugfs file location:
    <debugfs_mnt>/ieee80211/phy#/ath9k/samples
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The recent commit "ath9k: Send legacy rated frames as unaggregated"
introduced a check to ensure that packets with non-MCS rates set in
the rate series will not be aggregated. However, it failed to check
if the rate series is valid before testing the flags, thus breaking
aggregation for normal MCS-only packets if the last series is unset.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

For AR9287 v1.3+ chips, MAC runs at 117MHz. But the initvals
IFS parameters are loaded based on 44/88MHz clockrate. So
eifs/usec from ini should not be used for AR9287 v1.3+.
The mentioned values are tested on 2 chain HT40 mode.
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Initialize 9us slot time as that is what is used mostly
(for non-ERP cases) and also to be in sync with initvals.
Signed-off-by: NRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

removed a function declaration, removed a variable, renamed a variable
Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

in the Rx path of the driver it would be better to use ATH_DBG_ANY
rather than ATH_DBG_XMIT for printing debug messages
Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

AR9340 is not listed in ath_mac_bb_names, which leads to such a message:
ieee80211 phy0: Atheros AR???? Rev:0 mem=0xb8100000, irq=2
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This has been tested in STA and AP mode by Florian.

Cc: David Quan <dquan@qca.qualcomm.com>
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Tested-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Here are the AR9580 1.0 initvals checksums using the
Atheros initvals-tools [1]. This is useful for when
we udate the initvals again with other values. It ensures
that we match the same initvals used internally. The
tool is documented on the wiki [2].

$ ./initvals -f ar9580-1p0
0x00000000e912711f        ar9580_1p0_modes_fast_clock
0x000000004a488fc7        ar9580_1p0_radio_postamble
0x00000000f3888b02        ar9580_1p0_baseband_core
0x0000000003f783bb        ar9580_1p0_mac_postamble
0x0000000094be244a        ar9580_1p0_low_ob_db_tx_gain_table
0x0000000094be244a        ar9580_1p0_high_power_tx_gain_table
0x0000000090be244a        ar9580_1p0_lowest_ob_db_tx_gain_table
0x00000000ed9eaac6        ar9580_1p0_baseband_core_txfir_coeff_japan_2484
0x00000000c4d66d1b        ar9580_1p0_mac_core
0x00000000e8e9043a        ar9580_1p0_mixed_ob_db_tx_gain_table
0x000000003521a300        ar9580_1p0_wo_xlna_rx_gain_table
0x00000000301fc841        ar9580_1p0_soc_postamble
0x00000000a9a06b3a        ar9580_1p0_high_ob_db_tx_gain_table
0x00000000a15ccf1b        ar9580_1p0_soc_preamble
0x0000000029495000        ar9580_1p0_rx_gain_table
0x0000000037ac0ee8        ar9580_1p0_radio_core
0x00000000603a1b80        ar9580_1p0_baseband_postamble
0x000000003d8b4396        ar9580_1p0_pcie_phy_clkreq_enable_L1
0x00000000398b4396        ar9580_1p0_pcie_phy_clkreq_disable_L1
0x00000000397b4396        ar9580_1p0_pcie_phy_pll_on_clkreq

[1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git
[2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool

Cc: David Quan <dquan@qca.qualcomm.com>
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Tested-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>