Per mmc-controller.yaml, the node pattern is "^mmc(@.*)?$" ,
so adjust the node.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: devicetree@vger.kernel.org
Acked-by: NYann Gautier <yann.gautier@foss.st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@foss.st.com>

The stm32mp1 TAMP peripheral has 32 backup registers that survive
a warm reset. This makes them suitable for storing a reboot
mode, which the vendor's kernel tree is already doing[0].

The actual syscon-reboot-mode child node can be added by a board.dts or
fixed up by the bootloader. For the child node to be probed, the
compatible needs to include simple-mfd. The binding now specifies this,
so have the SoC dtsi adhere to it.

[0]: https://github.com/STMicroelectronics/linux/commit/2e9bfc29ddSigned-off-by: NAhmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Two backup registers are used to store the Cortex-M4 state and the resource
table address.
Declare the tamp node and add associated properties in m4_rproc node
to allow Linux to attach to a firmware loaded by the first boot stages.

Associated driver implementation is available in commit 9276536f
("remoteproc: stm32: Parse syscon that will manage M4 synchronisation").
Signed-off-by: NArnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk
endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes).
This patch optimizes USB OTG FIFO sizes accordingly.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Update mdma1 clients channel priority level following stm32-mdma bindings.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

LP timer can be used to wakeup from stop mode on stm32mp151.
Add wakeup-source properties to all LP timer instances.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add all LP timer irqs on stm32mp151.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Update the IP version to v2.0, which supports linked lists in internal DMA,
and is present in STM32MP1 SoCs.

The mmci driver supports the v2.0 periph id since 7a2a98be ("mmc: mmci:
Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into
the SoC device tree to benefit from the improved DMA support.
Signed-off-by: NLudovic Barre <ludovic.barre@st.com>
Signed-off-by: NYann Gautier <yann.gautier@st.com>
Signed-off-by: NAhmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.
Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: NAmelie Delaunay <amelie.delaunay@st.com>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Enable FIFO mode with half-full threshold.
Signed-off-by: NHugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add arm-pmu node on stm32mp15.
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Marek Vasut <marex@denx.de> # update to linux-next
Tested-by: Marek Vasut <marex@denx.de> # on DH PDK2 and Avenger96
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

This patch adds FMC2 External Bus Interface support on stm32mp157c.
Signed-off-by: NChristophe Kerello <christophe.kerello@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add the missing #address-cells and #size-cells to spi node.
Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Declare PSCI v1.0 support instead of v0.1 as the former is supported
by the PSCI firmware stacks stm32mp15x relies on.
Signed-off-by: NEtienne Carriere <etienne.carriere@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add the syscfg-fmp property in each i2c node in order to allow
Fast Mode Plus speed if clock-frequency >= 1MHz is indicated.
Signed-off-by: NAlain Volmat <alain.volmat@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Replace previous st,stm32f7-i2c compatible with st,stm32mp15-i2c
for the platform stm32mp151.
Signed-off-by: NAlain Volmat <alain.volmat@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add declarations related to the syscon pdds for deep sleep management.
Signed-off-by: NArnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

The cell count for address and size is defined by the binding and not
something a board would change. Avoid each board adding this
boilerplate by having the cell size specification in the SoC DTSI.
Signed-off-by: NAhmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Fix a typo on STM32MP15 DAC, e.g. s/channels/channel

Fixes: da6cddc7 ("ARM: dts: stm32: Add DAC support to stm32mp157c")
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their
Cortex-A7 cores running at 650 MHz.

Add the clock-frequency property to CPU nodes to avoid warnings about
them missing.

[1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html
[2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html
[3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.htmlSigned-off-by: NAhmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add the wakeup-source property in all i2c nodes of
the SoC stm32mp157c so that those I2C controllers can become
wakeup-source.
Signed-off-by: NAlain Volmat <alain.volmat@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

resets property is well-managed in DMA drivers. In previous products,
there were no reset lines, that's why they are missing here in dma1, dma2,
dmamux and mdma nodes.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Using the st,stm32mp15-hsotg compatible allows to use USB OTG with Dual Role
mode support.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add missing 'eth-ck' clock to the ethernet node on stm32mp1. These
clock are used to generate external clock signal for the PHY in case
'st,eth_ref_clk_sel' is specified.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Christophe ROULLIER <christophe.roullier@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Change non volatile node name from nvmem to efuse to be compliant
with yaml schema.
Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Update of the mlahb node according to to DT bindings using json-schema
Signed-off-by: NArnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Modify dma controller nodes name to fit with the standard naming.
Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

When there is no activity on ethernet phy link, the ETH_GTX_CLK is cut.
Signed-off-by: NChristophe Roullier <christophe.roullier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Syscfg is now activated automatically when syscfg registers are used.
Signed-off-by: NChristophe Roullier <christophe.roullier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

This commit creates a new file to manage security diversity on STM32MP15x
SOCs. On STM32MP15xY, "Y" gives information:
 -Y = A means no cryp IP and no secure boot.
 -Y = C means cryp IP + secure boot.
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

STM32MP151 and STM32MP153 were not explicitly supported through
stm32mp157c.dts. This commit adds dedicated files to support all STM32MP15
SOCs family.

The differences between those SOCs are:
 -STM32MP151 [1]: common file.
 -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU.
 -STM32MP157 [3]: STM32MP153 + DSI + GPU.

[1] https://www.st.com/resource/en/reference_manual/dm00366349.pdf
[2] https://www.st.com/resource/en/reference_manual/dm00366355.pdf
[3] https://www.st.com/resource/en/reference_manual/dm00327659.pdfSigned-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

This commit modifies stm32mp157 pinctrl files to better manage STM32MP15xx
SOCs diversity. Pin controller and gpio controller are moved to common SOC
dtsi file. Only pin groups remain in the main pinctrl dtsi file.
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

The STM32MP157 SoC series includes 3 instances of the SDMMC peripheral.
The sdmmc2 and sdmmc3 nodes are added in STM32MP157 SoC DT file.
Signed-off-by: NLudovic Barre <ludovic.barre@st.com>
Signed-off-by: NYann Gautier <yann.gautier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Add counter support on stm32mp157c that provides quadrature encoder on
timers 1, 2, 3, 4, 5 and 8.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

Split the 10Kbytes CAN message RAM to be able to use simultaneously
FDCAN1 and FDCAN2 instances.
First 5Kbytes are allocated to FDCAN1 and last 5Kbytes are used for
FDCAN2. To do so, set the offset to 0x1400 in mram-cfg for FDCAN2.

Fixes: d44d6e02 ("ARM: dts: stm32: change CAN RAM mapping on stm32mp157c")
Signed-off-by: NChristophe Roullier <christophe.roullier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

This patch adds support of STM32 PWR regulators on
stm32mp157c. This replace dummy fixed regulators on
stm32mp157c-ed1 and stm32mp157c-dk2.
Signed-off-by: NPascal Paillet <p.paillet@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

On stm32mp157c, the ADC inputs are multiplexed with analog switches which
have reduced performances when their supply is below 2.7V (vdda by
default).
Add syscfg registers that can be used on stm32mp157c, to get full ADC
analog performances.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>

STM32 Timers support generic 3 cells PWM to encode PWM number, period and
polarity.

Fixes: 61fc211c ("ARM: dts: stm32: add timers support to stm32mp157c")
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com>