- 21 1月, 2015 1 次提交
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由 Kevin Hao 提交于
So the boards which has COMMON_CLK enabled don't have to invoke this in its board specific file. Signed-off-by: NKevin Hao <haokexin@gmail.com> Acked-by: NScott Wood <scottwood@freescale.com> Acked-by: NMichael Turquette <mturquette@linaro.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 13 1月, 2014 6 次提交
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由 Gerhard Sittig 提交于
improve the common clock support code for MPC512x - expand the CCM register set declaration with MPC5125 related registers (which reside in the previously "reserved" area) - tell the MPC5121, MPC5123, and MPC5125 SoC variants apart, and derive the availability of components and their clocks from the detected SoC (MBX, AXE, VIU, SPDIF, PATA, SATA, PCI, second FEC, second SDHC, number of PSC components, type of NAND flash controller, interpretation of the CPMF bitfield, PSC/CAN mux0 stage input clocks, output clocks on SoC pins) - add backwards compatibility (allow operation against a device tree which lacks clock related specs) for MPC5125 FECs, too telling SoC variants apart and adjusting the clock tree's generation occurs at runtime, a common generic binary supports all of the chips the MPC5125 approach to the NFC clock (one register with two counters for the high and low periods of the clock) is not implemented, as there are no users and there is no common implementation which supports this kind of clock -- the new implementation would be unused and could not get verified, so it shall wait until there is demand Signed-off-by: NGerhard Sittig <gsi@denx.de> Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Gerhard Sittig 提交于
the SDHC clock is derived from CSB with a fractional divider which can address "quarters"; the implementation multiplies CSB by 4 and divides it by the (integer) divider value a bug in the clock domain synchronisation requires that only even divider values get setup; we achieve this by - multiplying CSB by 2 only instead of 4 - registering with CCF the divider's bit field without bit0 - the divider's lowest bit remains clear as this is the reset value and later operations won't touch it this change keeps fully utilizing common clock primitives (needs no additional support logic, and avoids an excessive divider table) and satisfies the hardware's constraint of only supporting even divider values Signed-off-by: NGerhard Sittig <gsi@denx.de> Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Gerhard Sittig 提交于
adjust (expand on or move) a few comments, add markers for easier navigation around helpers Signed-off-by: NGerhard Sittig <gsi@denx.de> Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Gerhard Sittig 提交于
this change removes workarounds which have become obsolete after migration to common clock support has completed - remove clkdev registration calls (compatibility clock item aliases) after all peripheral drivers were adjusted for device tree based clock lookup - remove pre-enable workarounds after all peripheral drivers were adjusted to acquire their respective clock items workarounds for these clock items get removed: FEC (ethernet), I2C, PSC (UART, SPI), PSC FIFO, USB, NFC (NAND flash), VIU (video capture), BDLC (CAN), CAN MCLK, DIU (video output) these clkdev registered names won't be provided any longer by the MPC512x platform's clock driver: "psc%d_mclk", "mscan%d_mclk", "usb%d_clk", "nfc_clk", "viu_clk", "sys_clk", "ref_clk" the pre-enable workaround for PCI remains, but depends on the presence of PCI related device tree nodes (disables the PCI clock in the absence of PCI nodes, keeps the PCI clock enabled in the presence of nodes) -- moving clock acquisition into the peripheral driver isn't possible for PCI because its initialization takes place before the platform clock driver gets initialized, thus the clock provider isn't available then Cc: Mike Turquette <mturquette@linaro.org> Cc: Anatolij Gustschin <agust@denx.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NGerhard Sittig <gsi@denx.de> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Gerhard Sittig 提交于
extend the recently added COMMON_CLK platform support for MPC512x such that it works with incomplete device tree data which lacks clock specs Cc: Mike Turquette <mturquette@linaro.org> Cc: Anatolij Gustschin <agust@denx.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NGerhard Sittig <gsi@denx.de> [agust@denx.de: moved node macro definitions out of the function body] Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Gerhard Sittig 提交于
this change implements a clock driver for the MPC512x PowerPC platform which follows the COMMON_CLK approach and uses common clock drivers shared with other platforms this driver implements the publicly announced set of clocks (those listed in the dt-bindings header file), as well as generates additional 'struct clk' items where the SoC hardware cannot easily get mapped to the common primitives (shared code) of the clock API, or requires "intermediate clock nodes" to represent clocks that have both gates and dividers the previous PPC_CLOCK implementation is kept in place and remains active for the moment, the newly introduced CCF clock driver will receive additional support for backwards compatibility in a subsequent patch before it gets enabled and will replace the PPC_CLOCK approach some of the clock items get pre-enabled in the clock driver to not have them automatically disabled by the underlying clock subsystem because of their being unused -- this approach is desirable because - some of the clocks are useful to have for diagnostics and information despite their not getting claimed by any drivers (CPU, internal and external RAM, internal busses, boot media) - some of the clocks aren't claimed by their peripheral drivers yet, either because of missing driver support or because device tree specs aren't available yet (but the workarounds will get removed as the drivers get adjusted and the device tree provides the clock specs) clkdev registration provides "alias names" for few clock items - to not break those peripheral drivers which encode their component index into the name that is used for clock lookup (UART, SPI, USB) - to not break those drivers which use names for the clock lookup which were encoded in the previous PPC_CLOCK implementation (NFC, VIU, CAN) this workaround will get removed as these drivers get adjusted after device tree based clock lookup has become available the COMMON_CLK implementation copes with device trees which lack an oscillator node (backwards compat), the REF clock is then derived from the IPS bus frequency and multiplier values fetched from hardware Cc: Mike Turquette <mturquette@linaro.org> Cc: Anatolij Gustschin <agust@denx.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NGerhard Sittig <gsi@denx.de> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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