Fix the following waring:

drivers/spi/spi-mxic.c: In function ‘mxic_spi_mem_exec_op’:
drivers/spi/spi-mxic.c:401:3: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation]
   if (op->data.dir == SPI_MEM_DATA_IN)
   ^~
drivers/spi/spi-mxic.c:403:4: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’
    if (op->data.dtr)
    ^~
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
Reviewed-by: NZhengxun Li <zhengxunli@mxic.com.tw>
Link: https://lore.kernel.org/r/20210810142405.2221540-1-yangyingliang@huawei.comSigned-off-by: NMark Brown <broonie@kernel.org>

Depending on the DMA driver being used, the struct dma_slave_config may
need to be initialized to zero for the unused data.

For example, we have three DMA drivers using src_port_window_size and
dst_port_window_size. If these are left uninitialized, it can cause DMA
failures.

For spi-pic32, this is probably not currently an issue but is still good to
fix though.

Fixes: 1bcb9f8c ("spi: spi-pic32: Add PIC32 SPI master driver")
Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210810081727.19491-2-tony@atomide.comSigned-off-by: NMark Brown <broonie@kernel.org>

Depending on the DMA driver being used, the struct dma_slave_config may
need to be initialized to zero for the unused data.

For example, we have three DMA drivers using src_port_window_size and
dst_port_window_size. If these are left uninitialized, it can cause DMA
failures.

For spi-fsl-dspi, this is probably not currently an issue but is still
good to fix though.

Fixes: 90ba3703 ("spi: spi-fsl-dspi: Add DMA support for Vybrid")
Cc: Sanchayan Maity <maitysanchayan@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Acked-by: NVladimir Oltean <vladimir.oltean@nxp.com>
Link: https://lore.kernel.org/r/20210810081727.19491-1-tony@atomide.comSigned-off-by: NMark Brown <broonie@kernel.org>

this patch fixed the build warnning in set cs timing.
Signed-off-by: NMason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210809055911.17538-1-Mason.Zhang@mediatek.comSigned-off-by: NMark Brown <broonie@kernel.org>

Driver patch for octal DTR mode support.

Owing to the spi_mem_default_supports_op() is not support dtr
operation. Based on commit <539cf68c> (spi: spi-mem: add
spi_mem_dtr_supports_op()) add spi_mem_dtr_supports_op()
to support dtr and keep checking the buswidth and command bytes.
Signed-off-by: NZhengxun Li <zhengxunli@mxic.com.tw>
Link: https://lore.kernel.org/r/1628054827-458-1-git-send-email-zhengxunli@mxic.com.twSigned-off-by: NMark Brown <broonie@kernel.org>

Don't use resource-managed spi_register helper to correct the driver
removal order and make it to match the error unwinding order of the
probe function.
Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210731192731.5869-2-digetx@gmail.comSigned-off-by: NMark Brown <broonie@kernel.org>

The Tegra SPI driver supports runtime PM, which controls the clock
enable state, but the clk is also enabled separately from the RPM
at the driver probe time, and thus, stays always on. Fix it.

Runtime PM now is always available on Tegra, hence there is no need to
check the RPM presence in the driver anymore. Remove these checks.
Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210731192731.5869-1-digetx@gmail.comSigned-off-by: NMark Brown <broonie@kernel.org>

This patch modified set_cs_timing parameter, no need pass in spi_delay
to set_cs_timing callback.
By the way, we modified the mediatek and tegra114 spi driver to fix build err.
In mediatek spi driver, We have support set absolute time not clk_count,
and call this function in prepare_message not user's API.
Signed-off-by: NMason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210804133746.6742-1-Mason.Zhang@mediatek.comSigned-off-by: NMark Brown <broonie@kernel.org>

As we know, spi core layer has removed spi_set_cs_timing() API.
So this patch moved spi_delay for cs_timing from spi_controller
to spi_device, because cs timing should be set by spi_device but
not controller.
Signed-off-by: NMason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210804133716.32040-1-Mason.Zhang@mediatek.comSigned-off-by: NMark Brown <broonie@kernel.org>

Prefer 'unsigned int' to bare use of 'unsigned'.
Signed-off-by: NJason Wang <wangborong@cdjrlc.com>
Link: https://lore.kernel.org/r/20210731133342.432575-1-wangborong@cdjrlc.comSigned-off-by: NMark Brown <broonie@kernel.org>

Use clk_prepare_enable()/clk_disable_unprepare() in preparation for switch
to Common Clock Framework, otherwise the following is visible:

WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:1011 clk_core_enable+0x9c/0xbc
Enabling unprepared ep93xx-spi.0
...
Hardware name: Cirrus Logic EDB9302 Evaluation Board
...
clk_core_enable
clk_core_enable_lock
ep93xx_spi_prepare_hardware
__spi_pump_messages
__spi_sync
spi_sync
spi_sync_transfer.constprop.0
regmap_spi_write
_regmap_raw_write_impl
_regmap_bus_raw_write
_regmap_update_bits
regmap_update_bits_base
cs4271_component_probe
snd_soc_component_probe
soc_probe_component
snd_soc_bind_card
edb93xx_probe
...
spi_master spi0: failed to prepare transfer hardware: -108
Signed-off-by: NAlexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: NNikita Shubin <nikita.shubin@maquefel.me>
Acked-by: NMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20210726140001.24820-3-nikita.shubin@maquefel.meSigned-off-by: NMark Brown <broonie@kernel.org>

This only works when the native chipselect is in use. On a board with a
Ti ADS7950 8 channel ADC. This patch reduces the time to read out all
channels once from 280 us to 20 us.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20210727124226.5571-1-u.kleine-koenig@pengutronix.deSigned-off-by: NMark Brown <broonie@kernel.org>

In some cases reset_sccr1() can be called when no message available.
This means that there is no associated chip to receive that message
and hence no threshold needs to be set. Adapt the function to such
cases.

Fixes: 3bbdc083 ("spi: pxa2xx: Reuse int_stop_and_reset() in couple of places")
Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210721121520.62605-1-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>

Security changes have forced the SPI controllers to be limited to
8 byte reads. Refactor the sequencing to just handle 8 bytes at a
time.
Signed-off-by: NEddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210716133915.14697-2-eajames@linux.ibm.comSigned-off-by: NMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org

For each usage of fifo_words it is clear if ->dynamic_burst is true or
not. This can be used to simplify the function a bit.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: NFabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20210716173927.2050620-1-u.kleine-koenig@pengutronix.deSigned-off-by: NMark Brown <broonie@kernel.org>

Reuse int_stop_and_reset() in couple of places.

While at it, change the order of the int_stop_and_reset() and pxa2xx_spi_off()
to be in align with the similar flow in int_error_stop().
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210719074842.36060-3-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>

In order to allow reset_sccr1() to be reused in DMA paths,
reset DMA bits in CR1 in this function.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210719074842.36060-2-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>

Convert reset_sccr1() to use pxa2xx_spi_update().
It will help for further improvements.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210719074842.36060-1-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>

The comment in setup_fifo_xfer() about setting the watermark wasn't
quite proper grammar and also stopped making sense around commit
6d66507d ("spi: spi-geni-qcom: Don't wait to start 1st transfer if
transmitting"). After that commit we actually start the transfer
_before_ the watermark interrupt comes.

I don't think the comment really has any value anymore. We've already
got a comment when we grab the spinlock saying that our interrupt can
come any time as a result of the things in the locked section. Let's
just remove it.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210712085010.1.Ie3bb9f9d30d6475bb75251d32635194c1c72b9ee@changeidSigned-off-by: NMark Brown <broonie@kernel.org>

This patch support tick_delay setting, some users need use
high-speed spi speed, which can use tick_delay to tuning spi clk timing.
Signed-off-by: NMason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210713114048.29509-1-mason.zhang@mediatek.comSigned-off-by: NMark Brown <broonie@kernel.org>

This patch add no_need_unprepare support for spi, if spi src clk is
MAIN PLL, it can keep the clk_prepare and will not cause low power
issue. So we no need do clk_prepare/clk_unprepare in runtime pm,
and it will get better performance, because clk_prepare has called
mutex lock.
In the same way,
clk_get_rate also has called mutex lock, so we moved it to spi_probe.
Signed-off-by: NMason Zhang <Mason.Zhang@mediatek.com>
Link: https://lore.kernel.org/r/20210629100814.21402-1-mason.zhang@mediatek.comSigned-off-by: NMark Brown <broonie@kernel.org>

Depending on the usage, it is necessary to perform the finalize
message operation either upon receiving the EOT interruption,
eiher upon receiving the DMA callback. Indeed, when relying
on DMA, even if the SPI EOT IT has been received, it is
necessary to wait for the end of the DMA RX transaction before
accessing to the data.
Signed-off-by: NAlain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-8-git-send-email-alain.volmat@foss.st.comSigned-off-by: NMark Brown <broonie@kernel.org>

In nominal cases, disable is called as part of the unprepare_message,
after receiving a EOT and after receiving all data so it doesn't
make sense to check for EOT and empty the FIFO.
Moreover, at the end of the disable, the SPI is disable (SPE) leading
to clear of all internal FIFO, leaving the IP in a known status.
Signed-off-by: NAlain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-7-git-send-email-alain.volmat@foss.st.comSigned-off-by: NMark Brown <broonie@kernel.org>

Remove flush parameter and check RXWNE or RXPLVL when end of transfer
flag is set.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: NAlain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-6-git-send-email-alain.volmat@foss.st.comSigned-off-by: NMark Brown <broonie@kernel.org>

0 byte transfer handling is now done within the core in code added
by commit b3063203 ("spi: Skip zero-length transfers in spi_transfer_one_message()")

This reverts commit 2269f5a8 ("spi: stm32: properly handle 0 byte transfer")
Signed-off-by: NAlain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-5-git-send-email-alain.volmat@foss.st.comSigned-off-by: NMark Brown <broonie@kernel.org>

This commit enables the pm_runtime autosuspend
and sets a 1ms autosuspend delay.
Signed-off-by: NAlain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-3-git-send-email-alain.volmat@foss.st.comSigned-off-by: NMark Brown <broonie@kernel.org>

Add pm_runtime calls in probe/probe error path and remove
in order to be consistent in all places in ordering and
ensure that pm_runtime is disabled prior to resources used
by the SPI controller.

This patch also fixes the 2 following warnings on driver remove:
WARNING: CPU: 0 PID: 743 at drivers/clk/clk.c:594 clk_core_disable_lock+0x18/0x24
WARNING: CPU: 0 PID: 743 at drivers/clk/clk.c:476 clk_unprepare+0x24/0x2c

Fixes: 038ac869 ("spi: stm32: add runtime PM support")
Signed-off-by: NAmelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: NAlain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1625646426-5826-2-git-send-email-alain.volmat@foss.st.comSigned-off-by: NMark Brown <broonie@kernel.org>

Since 00b80ac9 ("spi: imx: mx51-ecspi: Move some initialisation to
prepare_message hook."), the MX51_ECSPI_CONFIG write no longer happens
in prepare_transfer hook, but rather in prepare_message hook, however
the MX51_ECSPI_CONFIG delay is still left in prepare_transfer hook and
thus has no effect. This leads to low bus frequency operation problems
described in 6fd8b850 ("spi: spi-imx: Fix out-of-order CS/SCLK
operation at low speeds") again.

Move the MX51_ECSPI_CONFIG write delay into the prepare_message hook
as well, thus reinstating the low bus frequency fix.

Fixes: 00b80ac9 ("spi: imx: mx51-ecspi: Move some initialisation to prepare_message hook.")
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20210703022300.296114-1-marex@denx.deSigned-off-by: NMark Brown <broonie@kernel.org>

In case of Full-Duplex mode, DXP flag is set when RXP and TXP flags are
set. But to avoid 2 different handlings, just add TXP and RXP flag in
the mask instead of DXP, and then keep the initial handling of TXP and
RXP events.
Also rephrase comment about EOTIE which is one of the interrupt enable
bits. It is not triggered by any event.
Signed-off-by: NAmelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: NAlain Volmat <alain.volmat@foss.st.com>
Reviewed-by: NAmelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/1625042723-661-3-git-send-email-alain.volmat@foss.st.comSigned-off-by: NMark Brown <broonie@kernel.org>

Some controllers like qcom geni need the parent device to be used for
dma mapping, so add a dma_map_dev field and let drivers fill this to be
used as mapping device
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210625052213.32260-4-vkoul@kernel.orgSigned-off-by: NMark Brown <broonie@kernel.org>

There is an assignment of ancillary->mode to itself which looks
dubious since the proceeding comment states that the speed and
mode is taken over from the SPI main device, indicating that
ancillary->mode should assigned using the value spi->mode.
Fix this.

Addresses-Coverity: ("Self assignment")
Fixes: 0c79378c ("spi: add ancillary device support")
Signed-off-by: NColin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20210623172300.161484-1-colin.king@canonical.comSigned-off-by: NMark Brown <broonie@kernel.org>

dmaengine_terminate_all() is deprecated in favor of explicitly saying if
it should be sync or async. Here, we want dmaengine_terminate_sync()
because there is no other synchronization code in the driver to handle
an async case.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210623095843.3228-3-wsa+renesas@sang-engineering.comSigned-off-by: NMark Brown <broonie@kernel.org>

dmaengine_terminate_all() is deprecated in favor of explicitly saying if
it should be sync or async. Here, we want dmaengine_terminate_sync()
because there is no other synchronization code in the driver to handle
an async case.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210623095843.3228-2-wsa+renesas@sang-engineering.comSigned-off-by: NMark Brown <broonie@kernel.org>

1.Add standard spi-cs-high support
2.Refer to spi-controller.yaml for details
Signed-off-by: NJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104848.19539-2-jon.lin@rock-chips.comSigned-off-by: NMark Brown <broonie@kernel.org>

1.Add standard cs-gpio support
2.Refer to spi-controller.yaml for details
Signed-off-by: NJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104848.19539-1-jon.lin@rock-chips.comSigned-off-by: NMark Brown <broonie@kernel.org>

After ROCKCHIP_SPI_VER2_TYPE2, SR->STB is a more accurate judgment
bit for spi slave transmition.
Signed-off-by: NJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-5-jon.lin@rock-chips.comSigned-off-by: NMark Brown <broonie@kernel.org>

The error here is to calculate the width as 8 bits. In fact, 16 bits
should be considered.
Signed-off-by: NJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-4-jon.lin@rock-chips.comSigned-off-by: NMark Brown <broonie@kernel.org>

Add compatible string for rv1126 for potential applications.
Signed-off-by: NJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-3-jon.lin@rock-chips.comSigned-off-by: NMark Brown <broonie@kernel.org>

The current sun6i SPI implementation initializes the transfer too early,
resulting in SCK going high before the transfer. When using an additional
(gpio) chipselect with sun6i, the chipselect is asserted at a time when
clock is high, making the SPI transfer fail.

This is due to SUN6I_GBL_CTL_BUS_ENABLE being written into
SUN6I_GBL_CTL_REG at an early stage. Moving that to the transfer
function, hence, right before the transfer starts, mitigates that
problem.

Fixes: 3558fe90 (spi: sunxi: Add Allwinner A31 SPI controller driver)
Signed-off-by: NMirko Vogt <mirko-dev|linux@nanl.de>
Signed-off-by: NRalf Schlatterbeck <rsc@runtux.com>
Link: https://lore.kernel.org/r/20210614144507.y3udezjfbko7eavv@runtux.comSigned-off-by: NMark Brown <broonie@kernel.org>

Introduce support for ancillary devices, similar to existing
implementation for I2C. This is useful for devices having
multiple chip-selects, for example some microcontrollers
provide a normal SPI interface and a flashing SPI interface.
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20210621175359.126729-2-sebastian.reichel@collabora.comSigned-off-by: NMark Brown <broonie@kernel.org>