- 25 7月, 2015 3 次提交
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由 Hans de Goede 提交于
On some boards there is no vbus_det gpio pin, instead vbus-detection for otg can be done via the pmic. This commit adds support for monitoring vbus_det via the power_supply exported by the pmic, enabling support for otg on these boards. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Hans de Goede 提交于
The sunxi musb glue needs to know if a host or normal usb cable is plugged in, add extcon support so that the musb glue can monitor the host status. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Acked-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Joachim Eastwood 提交于
Add PHY driver for the internal USB OTG PHY found on NXP LPC18xx and LPC43xx devices. This driver takes care of enabling the PHY in CREG (syscon) and setting the required clock frequency. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 15 7月, 2015 1 次提交
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由 Sebastian Ott 提交于
Fix this compile error: drivers/built-in.o: In function 'mv_usb2_phy_probe': phy-pxa-28nm-usb2.c:(.text+0x25ec): undefined reference to 'devm_ioremap_resource' drivers/built-in.o: In function 'mv_hsic_phy_probe': phy-pxa-28nm-hsic.c:(.text+0x3084): undefined reference to 'devm_ioremap_resource' Signed-off-by: NSebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 22 6月, 2015 1 次提交
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由 Andrew Bresticker 提交于
Add a driver for the USB2.0 PHY found on the IMG Pistachio SoC. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: James Hartley <james.hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9728/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 10 6月, 2015 2 次提交
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由 Rob Herring 提交于
Add PHY driver for the Marvell HSIC 28nm PHY. This PHY is found in PXA1928 SOC. Signed-off-by: NRob Herring <robh@kernel.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Rob Herring 提交于
Add driver for USB 28nm PHY found in Marvell PXA1928 SOC. Signed-off-by: NRob Herring <robh@kernel.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 22 5月, 2015 1 次提交
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由 Brian Norris 提交于
Supports up to two ports which can each be powered on/off and configured independently. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 14 5月, 2015 1 次提交
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由 Heikki Krogerus 提交于
TUSB1210 ULPI PHY has vendor specific register for eye diagram tuning. On some platforms the system firmware has set optimized value to it. In order to not loose the optimized value, the driver stores it during probe and restores it every time the PHY is powered back on. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NDavid Cohen <david.a.cohen@linux.intel.com> Acked-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 12 5月, 2015 2 次提交
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由 Felipe Balbi 提交于
DM816x PHY uses usb_phy_* methods and because of that, it must select USB_PHY, however, because the drivers in question (DM816x, TWL4030 and OMAP_USB2) sit outside of drivers/usb/ directory, meaning they can be built even if USB_SUPPORT=n. This patches fixes the dependencies by adding USB_SUPPORT as a dependency and making all drivers select USB_PHY (which cannot be selected through menuconfig). Note that this fixes some linking breakages when building with randconfig. Cc: Tony Lindgren <tony@atomide.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Stephen Boyd 提交于
This phy only exists on platforms under ARCH_QCOM, not ARCH_MSM. Cc: Yaniv Gardi <ygardi@codeaurora.org> Cc: Dov Levenglick <dovl@codeaurora.org> Cc: Christoph Hellwig <hch@lst.de> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Reviewed-by: NYaniv Gardi <ygardi@codeaurora.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 03 4月, 2015 2 次提交
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由 Chen-Yu Tsai 提交于
Unlike previous Allwinner SoCs, there is no central PHY control block on the A80. Also, OTG support is completely split off into a different controller. This adds a new driver to support the regular USB PHYs. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Tony Lindgren 提交于
Add a minimal driver for dm816x USB. This makes USB work on dm816x without any other changes needed as it can use the existing musb_dsps glue layer for the USB controller. Note that this phy is different from dm814x and am335x. Cc: Bin Liu <binmlist@gmail.com> Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Bolle <pebolle@tiscali.nl> Cc: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 30 1月, 2015 1 次提交
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由 Yunzhi Li 提交于
This patch to add a generic PHY driver for ROCKCHIP usb PHYs, currently this driver can support RK3288. The RK3288 SoC have three independent USB PHY IPs which are all configured through a set of registers located in the GRF (general register files) module. Signed-off-by: NYunzhi Li <lyz@rock-chips.com> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 21 1月, 2015 1 次提交
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由 Yaniv Gardi 提交于
This change adds a generic and common API support for ufs phy QUALCOMM Technologies. This support provides common code and also points to specific phy callbacks to differentiate between different behaviors of frequent use-cases (like power on, power off, phy calibration etc). Signed-off-by: NYaniv Gardi <ygardi@codeaurora.org> Reviewed-by: NDov Levenglick <dovl@codeaurora.org> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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- 26 11月, 2014 1 次提交
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由 Gregory CLEMENT 提交于
The Armada 375 SoC comes with an USB2 host and device controller and an USB3 controller. The USB cluster control register allows to manage common features of both USB controllers. This commit adds a driver integrated in the generic PHY framework to control this USB cluster feature. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> [ kishon@ti.com : Made it to use the updated devm_phy_create API and soem cosmentic changes in Kconfig file.] Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NJason Cooper <jason@lakedaemon.net>
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- 22 11月, 2014 1 次提交
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由 Vivek Gautam 提交于
This PHY controller is also present on Exynos7 platform in arch-exynos family. So PHY_EXYNOS5_USBDRD should now depend on ARCH_EXYNOS. Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 21 11月, 2014 1 次提交
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由 Antoine Tenart 提交于
Add the driver driving the Marvell Berlin USB PHY. This allows to initialize the PHY and to use it from the USB driver later. Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 12 11月, 2014 1 次提交
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由 Gabriel FERNANDEZ 提交于
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe or USB3 devices. Signed-off-by: Nalexandre torgue <alexandre.torgue@st.com> Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 24 9月, 2014 3 次提交
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由 Peter Griffin 提交于
This driver adds support for USB (1.1 and 2.0) phy for STiH415 and STiH416 System-On-Chips from STMicroelectronics. Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com> Signed-off-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Peter Griffin 提交于
This is the generic phy driver for the picoPHY ports used by the USB2 and USB3 Host controllers when controlling usb2/1.1 devices. It is found on STiH407 SoC family from STMicroelectronics. Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Sergei Shtylyov 提交于
This PHY, though formally being a part of Renesas USBHS controller, contains the UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls them channels) to the different USB controllers: channel 0 can be connected to either PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI EHCI/OHCI or xHCI controllers. This is a new driver for this USB PHY currently already supported under drivers/ usb/phy/. The reason for writing the new driver was the requirement that the multiplexing of USB channels to the controller be dynamic, depending on what USB drivers are loaded, rather than static as provided by the old driver. The infrastructure provided by drivers/phy/phy-core.c seems to fit that purpose ideally. The new driver only supports device tree probing for now. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 12 9月, 2014 2 次提交
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ST SPEAR1340-MIPHY support should be available only on ST SPEAr1340 machine. Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Mohit Kumar <mohit.kumar@st.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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ST SPEAR1310-MIPHY support should be available only on ST SPEAr1310 machine. Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Mohit Kumar <mohit.kumar@st.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 28 8月, 2014 1 次提交
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由 Lee Jones 提交于
Enabling GENERIC_PHY in the shared (by most ARM sub-architectures) defconfig multi_v7_defconfig is prohibited. Instead, we'll enable it from the Kconfig whenever PHY_MIPHY365X is enabled. Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 22 7月, 2014 9 次提交
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由 Lee Jones 提交于
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; both SATA, both PCIe or one of each in any configuration. Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NAlexandre Torgue <alexandre.torgue@st.com> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Kumar Gala 提交于
Add a PHY driver for uses with AHCI based SATA controller driver on the IPQ806x family of SoCs. Signed-off-by: NKumar Gala <galak@codeaurora.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Antoine Ténart 提交于
The Berlin SoC has a two SATA ports. Add a PHY driver to handle them. The mode selection can let us think this PHY can be configured to fit other purposes. But there are reasons to think the SATA mode will be the only one usable: the PHY registers are only accessible indirectly through two registers in the SATA range, the PHY seems to be integrated and no information tells us the contrary. For these reasons, make the driver a SATA PHY driver. Signed-off-by: NAntoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Andrew Lunn 提交于
mach-kirkwood has been removed, now that kirkwood lives in mach-mvebu. Depend on MACH_KIRKWOOD, which will be set when these SoCs are built as part of mach-mvebv. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Srinivas Kandagatla 提交于
Add a PHY driver for uses with AHCI based SATA controller driver on the APQ8064 family of SoCs. This patch is a forward port from Qualcomm's v3.4 andriod kernel. Tested on IFC6410 board. CC: Sujit Reddy Thumma <sthumma@codeaurora.org> Tested-by: NKiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Sachin Kamat 提交于
USB DWC3 driver on Exynos platform does not work without its corresponding phy driver. Hence make the PHY driver depend on Exynos DWC3 driver and default it to yes to make things easier for the end user. Signed-off-by: NSachin Kamat <sachin.kamat@samsung.com> Reviewed-by: NJingoo Han <jg1.han@samsung.com> Tested-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Sachin Kamat 提交于
Since the USB 2.0 PHYs are required with EHCI/OHCI USB drivers and USB gadget controller supported by the DWC2 gadget driver, make it depend on them and default to ARCH_EXYNOS as they are meant for Exynos platforms. Also, make the sub-drivers silent options enabling them based on the SoC platforms that they are meant to work with. This will make life easier for end users who do not have any way knowing the dependencies. Signed-off-by: NSachin Kamat <sachin.kamat@samsung.com> Reviewed-by: NJingoo Han <jg1.han@samsung.com> Tested-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Marek Szyprowski 提交于
This patch adds support for Exynos3250 SoC to Exynos2USB PHY driver. Although Exynos3250 has only one device phy interface, the register layout and all operations that are required to get it enabled are almost same as on Exynos4x12. The only different is one more register (REFCLKSEL) which need to be set and lack of MODE SWITCH register. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Jiancheng Xue 提交于
Add hix5hd2-sata-phy driver on Hisilicon hix5hd2 soc. Signed-off-by: NJiancheng Xue <xuejiancheng@huawei.com> Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 19 7月, 2014 1 次提交
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由 Mateusz Krawczuk 提交于
Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver. Signed-off-by: NMateusz Krawczuk <m.krawczuk@partner.samsung.com> [k.debski@samsung.com: cleanup and commit description] [k.debski@samsung.com: make changes accordingly to the mailing list comments] Signed-off-by: NKamil Debski <k.debski@samsung.com> Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 14 7月, 2014 1 次提交
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由 Pratyush Anand 提交于
ARM based ST Microelectronics's SPEAr1310/40 platforms uses ST's phy (known as 'miphy') for PCIe and SATA. This patch adds drivers for these miphys. This also adds proper bindings for miphys. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Tested-by: NMohit Kumar <mohit.kumar@st.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> [viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches] Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
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- 12 7月, 2014 1 次提交
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由 Maxime Ripard 提交于
The driver depend on the reset framework in a mandatory way. Make sure reset_control_get is defined by adding this dependency in Kconfig Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 11 6月, 2014 1 次提交
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由 Chen Gang 提交于
When NO_IOMEM is enabled (e.g. score architecture), some drivers which need HAS_IOMEM need notice about it, or it will report related warning: warning: (GPIO_SCH && GPIO_ICH && GPIO_VX855 && GPIO_RDC321X && IE6XX_WDT && RADIO_WL1273 && HID_SENSOR_HUB && MFD_NVEC) selects MFD_CORE which has unmet direct dependencies (HAS_IOMEM) Signed-off-by: NChen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 13 5月, 2014 1 次提交
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由 Vivek Gautam 提交于
Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs. The new driver uses the generic PHY framework and will interact with DWC3 controller present on Exynos5 series of SoCs. Also, created a new header file in linux/mfd/syscon/ for Exynos5 SoCs and put the required PMU offset definitions for the basic available PHYs. Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 12 5月, 2014 1 次提交
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由 Arnd Bergmann 提交于
All other phy drivers use 'select', while this one is the only one to use 'depends on'. This is not a bug, just slightly inconsistent, so let's change it to do things the same way as everyone else. We may also want to turn GENERIC_PHY into a silent option that only ever gets turned on if another driver needs it. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Matt Porter <mporter@linaro.org> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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