This config is used to test the base support for i.MX51 processors on the
Babbage board
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

Babbage is a reference board from Freescale for their i.MX51 SoC.

Add board definition, Kconfig and Makefiles to enable Freescale i.MX51
processor and Babbage board.

Boot tested on a Babbage2.5 board
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

Add basic clock support, cpu identification, I/O mapping, interrupt
controller, serial port and ethernet.
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

Prepare for i.MX5 SoC code by adding the relevant macros to common plat-mxc
code.
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

Refactor the timer code into version 1 and version 2.

Essentially there are 2 versions of the timer hardware on Freescale MXC
hardware. Version 1 is found on MX1/MXL, MX21 and MX27. Version 2 is found on
MX25, MX31, MX35, MX37, MX51, and future parts.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

Freescale i.MX51 processor uses a new interrupt controller. Add
driver for TrustZone Interrupt Controller
Signed-off-by: NAmit Kucheria <amit.kucheria@canonical.com>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Mack <daniel@caiaq.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Mack <daniel@caiaq.de>

- The SIC mask is only 2bits wide, not 4
- MX31_OTG_PM_BIT and MX31_H1_PM_BIT use negative logic
- clear MX31_H1_DT_BIT and MX31_H2_DT_BIT so that they can be cleared,
  not only set.
- return -EINVAL if called with an invalid controller number
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Mack <daniel@caiaq.de>

The i.MX35 works fine with this driver, but we do not have
the usb_ahb clock.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>

Due to the `ret = gpio_request()' below in the loop, the initial -EINVAL value
of ret is overwritten.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This is a further step in allowing to build a kernel image for more
than one imx SOC.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This makes the file compilable for a kernel that supports both imx21 and
imx27.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This simplifies the macro and makes is similar to the other
..._IO_ADDRESS macros defined for imx SOCs.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Apart from MXC91231_IO_ADDRESS itself this was the only usage of
MXC91231_AIPS1_IO_ADDRESS.  Now MXC91231_IO_ADDRESS can be recoded with
IMX_IO_ADDRESS and all helper macros can go away.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Daniel Schaeffer <daniel.schaeffer@timesys.com>
Cc: Alberto Panizzo <maramaopercheseimorto@gmail.com>
Cc: Ivo Clarysse <ivo.clarysse@gmail.com>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

The old names are defined only if the cpp symbol
IMX_NEEDS_DEPRECATED_SYMBOLS exists, which is defined (for now) for all
files below arch/arm/mach-mx1.

This was done earlier for mx2 and mx3, too.

USBD_INT0 is for now defined unconditionally to prevent breaking
drivers/usb/gadget/imx_udc.

While at it use IMX_IO_ADDRESS to define MX1_IO_ADDRESS which
adds a cast to the IO_ADDRESS macro fixing many warnings like

	arch/arm/mach-mx1/generic.c:51: warning: passing argument 1 of 'mxc_init_irq' makes pointer from integer without a cast

.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Reported-by: NTim Sander <tstone@vlsi.informatik.tu-darmstadt.de>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch adds SDHC support, and corrects current pins setup.
Added irq handling on card removal.
Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This fixes:

	arch/arm/kernel/debug.S:147: Error: constant expression expected -- `ldrne r3,=(((UART1_BASE_ADDR)-AIPI_BASE_ADDR)+AIPI_BASE_ADDR_VIRT)'
	arch/arm/kernel/debug.S:163: Error: constant expression expected -- `ldrne r3,=(((UART1_BASE_ADDR)-AIPI_BASE_ADDR)+AIPI_BASE_ADDR_VIRT)'

when compiling for mx2 with CONFIG_DEBUG_LL=y.  A similar error exists
on mx3 and is fixed by this commit, too.

These were introduced by aae70193.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This makes the FEC clock configuration consistent with the UART one.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The gpt_clk rate function doesn't consider the PER divider. This causes a
significant drift in time accounting. Fix this by introducing the correct rate
calculation function.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch disables all unnecessary clock in mx25_clocks_init() to make a clean
start, the same as is being done for the rest of the i.MX chips.

This patch was tested on i.MX25 PDK.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The fref is needless on mx25 since the reference clock is fixed at 24MHz.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

For uarts and fec need two clocks, implement it using the secondary clock
field in struct clk.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

To distinguish between mx31lite and mx31lilly boards better to use
different enum types.
Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com>
Acked-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>