1. 31 8月, 2013 2 次提交
    • H
      mtd: add data structures for Extended Parameter Page · 5138a98f
      Huang Shijie 提交于
      Since the ONFI 2.1, the onfi spec adds the Extended Parameter Page
      to store the ECC info.
      
      The onfi spec tells us that if the nand chip's recommended ECC codeword
      size is not 512 bytes, then the @ecc_bits is 0xff. The host _SHOULD_ then
      read the Extended ECC information that is part of the extended parameter
      page to retrieve the ECC requirements for this device.
      
      This patch adds
          [1] the neccessary fields for nand_onfi_params{},
          [2] and adds the onfi_ext_ecc_info{} for Extended ECC information,
          [3] adds onfi_ext_section{} for extended sections,
          [4] and adds onfi_ext_param_page{} for the Extended Parameter Page.
      Acked-by: NPekon Gupta <pekon@ti.com>
      Signed-off-by: NHuang Shijie <b32955@freescale.com>
      Reviewed-and-tested-by: NBrian Norris <computersforpeace@gmail.com>
      [Brian: amended for checkpatch.pl]
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      5138a98f
    • H
      mtd: add datasheet's ECC information to nand_chip{} · 4cfeca2d
      Huang Shijie 提交于
      1.) Why add the ECC information to the nand_chip{} ?
         Each nand chip has its requirement for the ECC correctability, such as
         "4bit ECC for each 512Byte" or "40bit ECC for each 1024Byte".
         This ECC info is very important to the nand controller, such as gpmi.
      
         Take the Micron MT29F64G08CBABA for example, its geometry is
         8KiB page size, 744 bytes oob size and it requires 40bit ECC per 1KiB.
         If we do not provide the ECC info to the gpmi nand driver, it has to
         calculate the ECC correctability itself. The gpmi driver will gets the 56bit
         ECC for per 1KiB which is beyond its BCH's 40bit ecc capibility.
         The gpmi will quits in this case. But in actually, the gpmi can supports
         this nand chip if it can get the right ECC info.
      
      2.) about the new fields.
         The @ecc_strength_ds stands for the ecc bits needed within the @ecc_step_ds.
         The two fields should be set from the nand chip's datasheets.
      
         For example:
      	"4bit ECC for each 512Byte" could be:
      		@ecc_strength_ds = 4, @ecc_step_ds = 512.
      	"40bit ECC for each 1024Byte" could be:
      		@ecc_strength_ds = 40, @ecc_step_ds = 1024.
      
      3.) Why do not re-use the @strength and @size in the nand_ecc_ctrl{}?
         The @strength and @size in nand_ecc_ctrl{} is used by the nand controller
         driver, while the @ecc_strength_ds and @ecc_step_ds are get from the datasheet.
      Signed-off-by: NHuang Shijie <b32955@freescale.com>
      Reviewed-and-tested-by: NBrian Norris <computersforpeace@gmail.com>
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      4cfeca2d
  2. 30 8月, 2013 1 次提交
  3. 06 8月, 2013 3 次提交
  4. 05 4月, 2013 13 次提交
  5. 14 3月, 2013 1 次提交
  6. 03 12月, 2012 1 次提交
    • M
      mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width · 64b37b2a
      Matthieu CASTET 提交于
      The driver call nand_scan_ident in 8 bit mode, then
      readid or onfi detection are done (and detect bus width).
      The driver should update its bus width before calling nand_scan_tail.
      
      This work because readid and onfi are read work 8 byte mode.
      
      Note that nand_scan_ident send command (NAND_CMD_RESET, NAND_CMD_READID, NAND_CMD_PARAM), address and read data
      The ONFI specificication is not very clear for x16 device if high byte of address should be driven to 0,
      but according to [1] it should be ok to not drive it during autodetection.
      
      [1]
      3.3.2. Target Initialization
      
      [...]
      The Read ID and Read Parameter Page commands only use the lower 8-bits of the data bus.
      The host shall not issue commands that use a word data width on x16 devices until the host
      determines the device supports a 16-bit data bus width in the parameter page.
      Signed-off-by: NMatthieu CASTET <matthieu.castet@parrot.com>
      Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
      64b37b2a
  7. 15 11月, 2012 1 次提交
  8. 29 9月, 2012 8 次提交
  9. 07 7月, 2012 3 次提交
  10. 14 5月, 2012 5 次提交
  11. 27 3月, 2012 2 次提交