1. 18 6月, 2021 5 次提交
    • S
      KVM: x86: Drop "pre_" from enter/leave_smm() helpers · ecc513e5
      Sean Christopherson 提交于
      Now that .post_leave_smm() is gone, drop "pre_" from the remaining
      helpers.  The helpers aren't invoked purely before SMI/RSM processing,
      e.g. both helpers are invoked after state is snapshotted (from regs or
      SMRAM), and the RSM helper is invoked after some amount of register state
      has been stuffed.
      Signed-off-by: NSean Christopherson <seanjc@google.com>
      Message-Id: <20210609185619.992058-10-seanjc@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      ecc513e5
    • S
      KVM: x86: Drop .post_leave_smm(), i.e. the manual post-RSM MMU reset · 01281165
      Sean Christopherson 提交于
      Drop the .post_leave_smm() emulator callback, which at this point is just
      a wrapper to kvm_mmu_reset_context().  The manual context reset is
      unnecessary, because unlike enter_smm() which calls vendor MSR/CR helpers
      directly, em_rsm() bounces through the KVM helpers, e.g. kvm_set_cr4(),
      which are responsible for processing side effects.  em_rsm() is already
      subtly relying on this behavior as it doesn't manually do
      kvm_update_cpuid_runtime(), e.g. to recognize CR4.OSXSAVE changes.
      Signed-off-by: NSean Christopherson <seanjc@google.com>
      Message-Id: <20210609185619.992058-9-seanjc@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      01281165
    • S
      KVM: x86: Replace .set_hflags() with dedicated .exiting_smm() helper · edce4654
      Sean Christopherson 提交于
      Replace the .set_hflags() emulator hook with a dedicated .exiting_smm(),
      moving the SMM and SMM_INSIDE_NMI flag handling out of the emulator in
      the process.  This is a step towards consolidating much of the logic in
      kvm_smm_changed(), including the SMM hflags updates.
      
      No functional change intended.
      Signed-off-by: NSean Christopherson <seanjc@google.com>
      Message-Id: <20210609185619.992058-4-seanjc@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      edce4654
    • S
      KVM: x86: Emulate triple fault shutdown if RSM emulation fails · 25b17226
      Sean Christopherson 提交于
      Use the recently introduced KVM_REQ_TRIPLE_FAULT to properly emulate
      shutdown if RSM from SMM fails.
      
      Note, entering shutdown after clearing the SMM flag and restoring NMI
      blocking is architecturally correct with respect to AMD's APM, which KVM
      also uses for SMRAM layout and RSM NMI blocking behavior.  The APM says:
      
        An RSM causes a processor shutdown if an invalid-state condition is
        found in the SMRAM state-save area. Only an external reset, external
        processor-initialization, or non-maskable external interrupt (NMI) can
        cause the processor to leave the shutdown state.
      
      Of note is processor-initialization (INIT) as a valid shutdown wake
      event, as INIT is blocked by SMM, implying that entering shutdown also
      forces the CPU out of SMM.
      
      For recent Intel CPUs, restoring NMI blocking is technically wrong, but
      so is restoring NMI blocking in the first place, and Intel's RSM
      "architecture" is such a mess that just about anything is allowed and can
      be justified as micro-architectural behavior.
      
      Per the SDM:
      
        On Pentium 4 and later processors, shutdown will inhibit INTR and A20M
        but will not change any of the other inhibits. On these processors,
        NMIs will be inhibited if no action is taken in the SMI handler to
        uninhibit them (see Section 34.8).
      
      where Section 34.8 says:
      
        When the processor enters SMM while executing an NMI handler, the
        processor saves the SMRAM state save map but does not save the
        attribute to keep NMI interrupts disabled. Potentially, an NMI could be
        latched (while in SMM or upon exit) and serviced upon exit of SMM even
        though the previous NMI handler has still not completed.
      
      I.e. RSM unconditionally unblocks NMI, but shutdown on RSM does not,
      which is in direct contradiction of KVM's behavior.  But, as mentioned
      above, KVM follows AMD architecture and restores NMI blocking on RSM, so
      that micro-architectural detail is already lost.
      
      And for Pentium era CPUs, SMI# can break shutdown, meaning that at least
      some Intel CPUs fully leave SMM when entering shutdown:
      
        In the shutdown state, Intel processors stop executing instructions
        until a RESET#, INIT# or NMI# is asserted.  While Pentium family
        processors recognize the SMI# signal in shutdown state, P6 family and
        Intel486 processors do not.
      
      In other words, the fact that Intel CPUs have implemented the two
      extremes gives KVM carte blanche when it comes to honoring Intel's
      architecture for handling shutdown during RSM.
      Signed-off-by: NSean Christopherson <seanjc@google.com>
      Message-Id: <20210609185619.992058-3-seanjc@google.com>
      [Return X86EMUL_CONTINUE after triple fault. - Paolo]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      25b17226
    • S
      KVM: x86: Move FPU register accessors into fpu.h · 43e51464
      Siddharth Chandrasekaran 提交于
      Hyper-v XMM fast hypercalls use XMM registers to pass input/output
      parameters. To access these, hyperv.c can reuse some FPU register
      accessors defined in emulator.c. Move them to a common location so both
      can access them.
      
      While at it, reorder the parameters of these accessor methods to make
      them more readable.
      
      Cc: Alexander Graf <graf@amazon.com>
      Cc: Evgeny Iakovlev <eyakovl@amazon.de>
      Signed-off-by: NSiddharth Chandrasekaran <sidcha@amazon.de>
      Message-Id: <01a85a6560714d4d3637d3d86e5eba65073318fa.1622019133.git.sidcha@amazon.de>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      43e51464
  2. 29 5月, 2021 1 次提交
  3. 07 5月, 2021 1 次提交
  4. 26 4月, 2021 1 次提交
    • S
      KVM: x86: Remove emulator's broken checks on CR0/CR3/CR4 loads · d0fe7b64
      Sean Christopherson 提交于
      Remove the emulator's checks for illegal CR0, CR3, and CR4 values, as
      the checks are redundant, outdated, and in the case of SEV's C-bit,
      broken.  The emulator manually calculates MAXPHYADDR from CPUID and
      neglects to mask off the C-bit.  For all other checks, kvm_set_cr*() are
      a superset of the emulator checks, e.g. see CR4.LA57.
      
      Fixes: a780a3ea ("KVM: X86: Fix reserved bits check for MOV to CR3")
      Cc: Babu Moger <babu.moger@amd.com>
      Signed-off-by: NSean Christopherson <seanjc@google.com>
      Message-Id: <20210422022128.3464144-2-seanjc@google.com>
      Cc: stable@vger.kernel.org
      [Unify check_cr_read and check_cr_write. - Paolo]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      d0fe7b64
  5. 18 3月, 2021 1 次提交
    • I
      x86: Fix various typos in comments · d9f6e12f
      Ingo Molnar 提交于
      Fix ~144 single-word typos in arch/x86/ code comments.
      
      Doing this in a single commit should reduce the churn.
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: linux-kernel@vger.kernel.org
      d9f6e12f
  6. 09 2月, 2021 2 次提交
  7. 04 2月, 2021 1 次提交
    • C
      KVM: X86: Rename DR6_INIT to DR6_ACTIVE_LOW · 9a3ecd5e
      Chenyi Qiang 提交于
      DR6_INIT contains the 1-reserved bits as well as the bit that is cleared
      to 0 when the condition (e.g. RTM) happens. The value can be used to
      initialize dr6 and also be the XOR mask between the #DB exit
      qualification (or payload) and DR6.
      
      Concerning that DR6_INIT is used as initial value only once, rename it
      to DR6_ACTIVE_LOW and apply it in other places, which would make the
      incoming changes for bus lock debug exception more simple.
      Signed-off-by: NChenyi Qiang <chenyi.qiang@intel.com>
      Message-Id: <20210202090433.13441-2-chenyi.qiang@intel.com>
      [Define DR6_FIXED_1 from DR6_ACTIVE_LOW and DR6_VOLATILE. - Paolo]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      9a3ecd5e
  8. 03 2月, 2021 1 次提交
    • S
      KVM: x86: Update emulator context mode if SYSENTER xfers to 64-bit mode · 943dea8a
      Sean Christopherson 提交于
      Set the emulator context to PROT64 if SYSENTER transitions from 32-bit
      userspace (compat mode) to a 64-bit kernel, otherwise the RIP update at
      the end of x86_emulate_insn() will incorrectly truncate the new RIP.
      
      Note, this bug is mostly limited to running an Intel virtual CPU model on
      an AMD physical CPU, as other combinations of virtual and physical CPUs
      do not trigger full emulation.  On Intel CPUs, SYSENTER in compatibility
      mode is legal, and unconditionally transitions to 64-bit mode.  On AMD
      CPUs, SYSENTER is illegal in compatibility mode and #UDs.  If the vCPU is
      AMD, KVM injects a #UD on SYSENTER in compat mode.  If the pCPU is Intel,
      SYSENTER will execute natively and not trigger #UD->VM-Exit (ignoring
      guest TLB shenanigans).
      
      Fixes: fede8076 ("KVM: x86: handle wrap around 32-bit address space")
      Cc: stable@vger.kernel.org
      Signed-off-by: NJonny Barker <jonny@jonnybarker.com>
      [sean: wrote changelog]
      Signed-off-by: NSean Christopherson <seanjc@google.com>
      Message-Id: <20210202165546.2390296-1-seanjc@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      943dea8a
  9. 13 11月, 2020 1 次提交
  10. 22 10月, 2020 1 次提交
  11. 28 9月, 2020 2 次提交
    • A
      KVM: x86: Allow deflecting unknown MSR accesses to user space · 1ae09954
      Alexander Graf 提交于
      MSRs are weird. Some of them are normal control registers, such as EFER.
      Some however are registers that really are model specific, not very
      interesting to virtualization workloads, and not performance critical.
      Others again are really just windows into package configuration.
      
      Out of these MSRs, only the first category is necessary to implement in
      kernel space. Rarely accessed MSRs, MSRs that should be fine tunes against
      certain CPU models and MSRs that contain information on the package level
      are much better suited for user space to process. However, over time we have
      accumulated a lot of MSRs that are not the first category, but still handled
      by in-kernel KVM code.
      
      This patch adds a generic interface to handle WRMSR and RDMSR from user
      space. With this, any future MSR that is part of the latter categories can
      be handled in user space.
      
      Furthermore, it allows us to replace the existing "ignore_msrs" logic with
      something that applies per-VM rather than on the full system. That way you
      can run productive VMs in parallel to experimental ones where you don't care
      about proper MSR handling.
      Signed-off-by: NAlexander Graf <graf@amazon.com>
      Reviewed-by: NJim Mattson <jmattson@google.com>
      
      Message-Id: <20200925143422.21718-3-graf@amazon.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      1ae09954
    • R
      KVM: x86: emulating RDPID failure shall return #UD rather than #GP · a9e2e0ae
      Robert Hoo 提交于
      Per Intel's SDM, RDPID takes a #UD if it is unsupported, which is more or
      less what KVM is emulating when MSR_TSC_AUX is not available.  In fact,
      there are no scenarios in which RDPID is supposed to #GP.
      
      Fixes: fb6d4d34 ("KVM: x86: emulate RDPID")
      Signed-off-by: NRobert Hoo <robert.hu@linux.intel.com>
      Message-Id: <1598581422-76264-1-git-send-email-robert.hu@linux.intel.com>
      Reviewed-by: NJim Mattson <jmattson@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      a9e2e0ae
  12. 13 9月, 2020 1 次提交
  13. 24 8月, 2020 1 次提交
  14. 05 6月, 2020 1 次提交
  15. 14 5月, 2020 1 次提交
  16. 17 3月, 2020 4 次提交
  17. 04 3月, 2020 1 次提交
    • V
      KVM: x86: clear stale x86_emulate_ctxt->intercept value · 342993f9
      Vitaly Kuznetsov 提交于
      After commit 07721fee ("KVM: nVMX: Don't emulate instructions in guest
      mode") Hyper-V guests on KVM stopped booting with:
      
       kvm_nested_vmexit:    rip fffff802987d6169 reason EPT_VIOLATION info1 181
          info2 0 int_info 0 int_info_err 0
       kvm_page_fault:       address febd0000 error_code 181
       kvm_emulate_insn:     0:fffff802987d6169: f3 a5
       kvm_emulate_insn:     0:fffff802987d6169: f3 a5 FAIL
       kvm_inj_exception:    #UD (0x0)
      
      "f3 a5" is a "rep movsw" instruction, which should not be intercepted
      at all.  Commit c44b4c6a ("KVM: emulate: clean up initializations in
      init_decode_cache") reduced the number of fields cleared by
      init_decode_cache() claiming that they are being cleared elsewhere,
      'intercept', however, is left uncleared if the instruction does not have
      any of the "slow path" flags (NotImpl, Stack, Op3264, Sse, Mmx, CheckPerm,
      NearBranch, No16 and of course Intercept itself).
      
      Fixes: c44b4c6a ("KVM: emulate: clean up initializations in init_decode_cache")
      Fixes: 07721fee ("KVM: nVMX: Don't emulate instructions in guest mode")
      Cc: stable@vger.kernel.org
      Suggested-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NVitaly Kuznetsov <vkuznets@redhat.com>
      Reviewed-by: NSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      342993f9
  18. 21 2月, 2020 1 次提交
  19. 28 1月, 2020 6 次提交
  20. 21 1月, 2020 1 次提交
    • S
      KVM: x86: Add dedicated emulator helpers for querying CPUID features · 5ae78e95
      Sean Christopherson 提交于
      Add feature-specific helpers for querying guest CPUID support from the
      emulator instead of having the emulator do a full CPUID and perform its
      own bit tests.  The primary motivation is to eliminate the emulator's
      usage of bit() so that future patches can add more extensive build-time
      assertions on the usage of bit() without having to expose yet more code
      to the emulator.
      
      Note, providing a generic guest_cpuid_has() to the emulator doesn't work
      due to the existing built-time assertions in guest_cpuid_has(), which
      require the feature being checked to be a compile-time constant.
      
      No functional change intended.
      Signed-off-by: NSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      5ae78e95
  21. 15 11月, 2019 1 次提交
  22. 12 9月, 2019 1 次提交
  23. 22 8月, 2019 2 次提交
  24. 19 7月, 2019 1 次提交
  25. 19 6月, 2019 1 次提交