The I2C GPIO arbitration driver is used on the Exynos5250 Snow Chromebook
to arbitrate the access to a I2C bus by the Application Processor or a EC.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Many Exynos devices have devices attached to their display ports.
This patch enables the needed Kconfig options to support different
configuration such as simple panel, embedded DisplayPort (eDP) to
LVDS bridges and HDMI displays.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
[kgene@kernel.org: savedefconfig]
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The rtc-s3c driver supports a range of S3C series Real-Time-Clocks found
on many Samsung SoCs. Build the driver as a module to support these RTC.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Build the Generic PWM Samsung driver as a module to support PWM
devices used in platforms with a Samsung SoC.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enable the needed Kconfig options to have support for the ChromeOS EC
I2C transport, I2C tunnel and chardev user-space interface.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enable the needed kconfig options to have support for Samsung USB 2.0
and USB 3.0 PHY drivers to support the USB PHYs found on Exynos SoCs.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
[kgene@kernel.org: savedefconfig]
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The Maxim max77802 Power Management IC is used on many Exynos machines.
Besides a bunch of regulators, this chip has a Real-Time-Clock (RTC)
and 2-channel 32kHz clock outputs.

Enable the kernel config options to have the drivers for these devices
built as a module.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
[kgene@kernel.org: removing useless REGULATOR_MAX77802 config]
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Build the spi-s3c64xx driver as a module to have support for
the SPI controller in several Samsung SoCs.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Select ARM_SINGLE_ARMV7M in defconfigs of the converted ARMv7-M
platforms.

[arnd: moved the efm32_defconfig change to the patch that
originally introduces the symbol, to avoid intermittent regression]
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add defconfig for Linux on Vybrid (vf610) on the secondary Cortex-
M4 CPU. The use of a XIP image has been tested which needs to be
loaded (e.g. using the custom m4boot loader) to the end of the
available RAM at address 0x8f000000. The Cortex-M4 has a code-alias
which makes sure that the instructions get fetched through the code
bus (alias starts at 0x00800000 => 0x80800000 in system address).
Hence, to get optimal performance, use 0x0f000000 as XIP_PHYS_ADDR.
This address is additionally shifted by the length of the minimal
loader which is inserted by m4boot. Currently, this offset is 0x80.

The standard DRAM base address is configured to 0x8C000000, which
gives the Cortex-M4 48MiB of RAM.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The original stm32 defconfig file looks for a ./rootfs.cpio file,
but that breaks with

  ../scripts/gen_initramfs_list.sh: Cannot open './rootfs.cpio'

when trying to build this kernel. Anybody who relies on the
current behavior should change their build scripts to append
the initramfs manually, as this patch removes that default
in order to help autmatic testing.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

The original zx defconfig file looks for a ./rootfs.cpio file,
but that breaks with

  scripts/gen_initramfs_list.sh: Cannot open 'initramfs.cpio.gz'

when trying to build this kernel. Anybody who relies on the
current behavior should change their build scripts to append
the initramfs manually, as this patch removes that default
in order to help autmatic testing.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NJun Nie <jun.nie@linaro.org>

Add the Atmel sama5d3 and sama5d4 and their peripherals to multi_v7_defconfig.

Note that the console will be ttyAT0 instead of the usual ttyS0.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

As an update of the sd/mmc DT definition needs the fixed voltage regulator, add
it to the at91 defconfigs.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch adds a new config for STM32 MCUs.
STM32F429 Discovery board boots successfully with this config applied.
Tested-by: NChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add basic defconfig support to zx SOC, including uart, mmc
 and other common config
Signed-off-by: NJun Nie <jun.nie@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Kernel configuration for NXP LPC18xx and LPC43xx devices.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This enables the CoreSight blocks found on the Ux500 SoC
into the Ux500 defconfig.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The Ux500 has a perfectly working PMU so let's put the perf
events into the defconfig. This will activate HW_PERF_EVENTS
by default.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enable all drivers under CONFIG_ARM_CRYPTO as modules. Enable
CONFIG_KERNEL_MODE_NEON as well so that the modules that either
contain a NEON alternative or consist solely of a NEON (or ARMv8
crypto extensions) accelerated implementation are enabled fully as
well.

Note that the ARMv8 modules will only be built if the detected
toolchain version is recent enough (binutils 2.23 or higher).
Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The legacy-only USB_RCAR_GEN2_PHY driver was replaced by the DT-only
PHY_RCAR_GEN2 driver.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add UniPhier, a new citizen in the ARM multi platform.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This enables the digicolor drivers that are already merged as
part of the multi_v7_defconfig file.

[arnd: change rtc and i2c to loadable modules]
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NFathi Boudra <fathi.boudra@linaro.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

The GPIO controller of Hisilicon hip04 Soc uses the IP from Sysnopsis,
gpio-dwapb.c can be reused to support this GPIO controller. This patch
adds related configure item in hisi_defconfig.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

The Marvell mwifiex driver prevents the system to enter into a suspend
state if the card power is not preserved during a suspend/resume cycle.

So Suspend-to-RAM and Suspend-to-idle are failing on Exynos5250 Snow.

Add the keep-power-in-suspend Power Management property to the SDIO/MMC
node so the mwifiex suspend handler doesn't fail and the system is able
to enter into a suspend state.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

Remove the extra zero in the "cpu-crit-0" trip point for exynos5420
and exynos5440.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

The Exynos4412 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-X2/U2/U3 boards.
Signed-off-by: NMarkus Reichl <m.reichl@fivetechno.de>
Tested-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: NChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

Commit ea08de16 ("ARM: dts: Add DISP1 power domain for exynos5420")
added a device node for the Exynos5420 DISP1 power domain but dit not
make the DP controller a consumer of that power domain.

This causes an "Unhandled fault: imprecise external abort" error if the
exynos-dp driver tries to access the DP controller registers and the PD
was turned off. This lead to a kernel panic and a complete system hang.

Make the DP controller device node a consumer of the DISP1 power domain
to ensure that the PD is turned on when the exynos-dp driver is probed.

Fixes: ea08de16 ("ARM: dts: Add DISP1 power domain for exynos5420")
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

Select IMX50, IMX6SX and LS1021A SoC support.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Make sure that xen_swiotlb_init allocates buffers that are DMA capable
when at least one memblock is available below 4G. Otherwise we assume
that all devices on the SoC can cope with >4G addresses. We do this on
ARM and ARM64, where dom0 is mapped 1:1, so pfn == mfn in this case.

No functional changes on x86.

From: Chen Baozi <baozich@gmail.com>
Signed-off-by: NChen Baozi <baozich@gmail.com>
Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
Tested-by: NChen Baozi <baozich@gmail.com>
Acked-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com>

Changes contributed by Marcel Ziswiler <marcel.ziswiler@toradex.com>:

  Enable HDA to support audio over HDMI and codecs connected to the HDA
  controller (needed by the Toradex Apalis Tegra30 Evaluation Board):
  - SND_HDA
  - SND_HDA_TEGRA
  - SND_HDA_INPUT_BEEP
  - SND_HDA_INPUT_JACK
  - SND_HDA_PATCH_LOADER
  - SND_HDA_CODEC_REALTEK
  - SND_HDA_CODEC_HDMI
  - SND_HDA_GENERIC

  Enable watchdog support:
  - WATCHDOG
  - TEGRA_WATCHDOG
Signed-off-by: NThierry Reding <treding@nvidia.com>

The L3 Error handling on OMAP5 for the most part is very similar
to that of OMAP4, and had leveraged common data structures and
register layout definitions so far. Upon closer inspection, there
are a few minor differences causing an incorrect decoding and
reporting of the master NIU upon an error:

  1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies
     11 bits on OMAP5 as against 8 bits on OMAP4, with the master
     NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR
     field.
  2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3
     input sources on OMAP5. The common DEBUGSS source is at a
     different input on each SoC.

Fix the above issues by using a OMAP5-specific compatible property
and using SoC-specific data where there are differences.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fix a typo in DRA7 dtsi where 12 bytes are needed for register
description of ABB efuse registers, however only 8 bytes are provided
to map. For some weird reason, this does not generate abort at offset
0x8, probably due to default maps already provided in io.c for the bus
register ranges.
Reported-by: NMatt Gessner <Matt.Gessner@windriver.com>
Reported-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

BeagleBoard-X15 pre-production change includes switching the GPIO fan
gpio over from 1 to 2 to allow for a potential fix at a later point in
time for USB client VBUS detection using PMIC VBUS detect capability.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

BeagleBoard-X15 pre-production change includes switching over to UART
pins that now allow for UART download capability. All original boards
should either have been returned for modifications or already modified
for the required change and maintaining compatibility for older boards
are no longer needed.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The new AM437x SK Beta boards have removed the
large capacitors on the gpio-matrix column lines
which means we can reduce col-scan-delay-us to 5us
without loosing functionality.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM437x Starter Kit uses a NewHaven Display module with
a 4.3" display and EDT FT5306 touchscreen

On that module's new revision, NewHave decided to change
the pinout on the 6 pin flat-pcb touchscreen connector so
that instead of having WAKE pin, we now have RESETn.

The new display module is available on AM437x SK Beta and
all new revisions while the older revision is only available
on AM437x SK Alpha which, unfortunately, can't be supported
anymore in mainline without a revert of this patch.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

With commit bc078316 ("ARM: dts: DRA7: Add node for RTC"), we now
have AM57xx RTC register itself as alias 0 even before DS1307 or TPS
rtc drivers are loaded up. However, since neither TPS, nor AM57xx RTC
are capable of being backedup by battery, we would like to maintain
the "primary" rtc as mcp79410 rtc device.

This also generates the following warnings in the bootlog highlighting
the issue:
[    5.895445] rtc-ds1307 2-006f: /aliases ID 0 not available
...
[    6.476285] palmas-rtc 48070000.i2c:tps659038@58:tps659038_rtc: /aliases ID 1 not available

So, add proper aliases to ensure that RTC order is always consistent
to userspace immaterial of probe order.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The interrupt polarity provided in devicetree is used to configure
the interrupt controller(ARM GIC), however, it seems that we have an
inverter at the GIC boundary inside AM57xx which inverts the signal
input from sys_irq external interrupt source.

Further, as per GIC distributor TRM,
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438d/BGBHIACJ.html#BABJFCFB
ARM GIC distributor does not support IRQ trigger type
IRQ_TYPE_LEVEL_LOW, and only rising or level high signals.

However, for some reason, the current configuration(which gets ignored
by GIC driver) functions on some platforms, however, on few platforms
results in infinite interrupts hogging the system down.

Switch over to rising edge for GIC configuration which is also aligned
with trigger point from the RTC chip and the internal inversion.

Fixes: 5a0f93c6 ("ARM: dts: Add am57xx-beagle-x15")
Signed-off-by: NGrygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>