This patch apply an extensible firmware dump framework,
so that other chipset can be easily added as needed.
Signed-off-by: NXinming Hu <huxm@marvell.com>
Signed-off-by: NCathy Luo <cluo@marvell.com>
Signed-off-by: NAmitkumar Karwar <akarwar@marvell.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

memory_type_mapping strucuture did not refer to other mwifiex
specific strture. A better software design method would keep
it in decl header file, which does not include other mwifiex
header file.
Signed-off-by: NXinming Hu <huxm@marvell.com>
Signed-off-by: NCathy Luo <cluo@marvell.com>
Signed-off-by: NAmitkumar Karwar <akarwar@marvell.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

If we are not able to read registers or PCIe memory,
it means PCIe device is in bad state. We will skip
firmware dump in this case.
Signed-off-by: NXinming Hu <huxm@marvell.com>
Signed-off-by: NCathy Luo <cluo@marvell.com>
Signed-off-by: NAmitkumar Karwar <akarwar@marvell.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

It is observed that ioread32 may fail to read pcie register
in certain scenarios, this patch handles these cases.
Signed-off-by: NXinming Hu <huxm@marvell.com>
Signed-off-by: NCathy Luo <cluo@marvell.com>
Signed-off-by: NAmitkumar Karwar <akarwar@marvell.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

drv_pkt_delay_max should be assigned non-zero value, so that
packet delay can be accumulate in the right way.
Signed-off-by: NXinming Hu <huxm@marvell.com>
Signed-off-by: NAmitkumar Karwar <akarwar@marvell.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Space needed before open parenthesis
Signed-off-by: NPaul McQuade <paulmcquad@gmail.com>
Acked-by: NHelmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Removed empty spaces before/after parenthesis
Signed-off-by: NPaul McQuade <paulmcquad@gmail.com>
Acked-by: NHelmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Removed empty spaces before/after parenthesis
Signed-off-by: NPaul McQuade <paulmcquad@gmail.com>
Acked-by: NHelmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

This patch adds an interface for handling commands like
iwconfig wlanX power on/off. Such an interface formerly existed
when the driver used wext.

While performance with sdio in polling mode without using
powersave mode is quite bad, powersaving mode is unusable,
so do not enable it under such conditions.
Signed-off-by: NAndreas Kemnade <andreas@kemnade.info>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

When the device is remove e.g. because of going to suspend
 mode with powersaving enabled, lbs_remove_card tries to exit
powersaving state even when already woken up. That command is
not processed properly in that situation, since the command
processing queue is already stopped, so it waits forever
for the command being processed, so disable it.
Signed-off-by: NAndreas Kemnade <andreas@kemnade.info>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Removes the old todo block and checks only whether ieee powersave
mode is requested. We still have to check for being connected as
this powersave mode includes logic for regularly waking up and
checking for packets which only makes sense when connected.
For not being connected, another mode is needed.
Signed-off-by: NAndreas Kemnade <andreas@kemnade.info>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

If the main thread gets one PS AWAKE event and one PS SLEEP event
in one iteration over event_fifo there will never be checks for
commands to be processed, since psstate will always be
PS_STATE_SLEEP or PS_STATE_PRE_SLEEP
Signed-off-by: NAndreas Kemnade <andreas@kemnade.info>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

If a sdio host does not support sdio irqs, polling is used
instead. That has an impact on performance. Some functionality
should not be enabled then. This add a variable in
libertas_priv to indicate that.
Signed-off-by: NAndreas Kemnade <andreas@kemnade.info>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

struct cmd_ds_802_11_ps_mode
contains the command header and a pointer to it was
initialized with data points to the body which leads to
mis-interpretation of the cmd_ds_802_11_ps_mode.action member.
cmd[0] contains the header, &cmd[1] points beyond that.
cmdnode->cmdbuf is a pointer to the command buffer
This piece of code was unused since power saving was
not enabled.
Signed-off-by: NAndreas Kemnade <andreas@kemnade.info>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

The NULL test here is reversed.

Fixes: 7d7f07d8 ('mwifiex: add wowlan net-detect support')
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Instead of using HT info from beacon IEs, use HT info from
association response frame to update bandwidth in
cfg80211_get_channel handler.
Signed-off-by: NNachiket Kukade <kukaden@marvell.com>
Signed-off-by: NAmitkumar Karwar <akarwar@marvell.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

The driver reads a value from hfa384x_from_bap(), which may fail,
and then assigns the value to a local variable. gcc detects that
in in the failure case, the 'rlen' variable now contains
uninitialized data:

In file included from ../drivers/net/wireless/intersil/hostap/hostap_pci.c:220:0:
drivers/net/wireless/intersil/hostap/hostap_hw.c: In function 'hfa384x_get_rid':
drivers/net/wireless/intersil/hostap/hostap_hw.c:842:5: warning: 'rec' may be used uninitialized in this function [-Wmaybe-uninitialized]
  if (le16_to_cpu(rec.len) == 0) {

This restructures the function as suggested by Russell King, to
make it more readable and get more reliable error handling, by
handling each failure mode using a goto.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

On a Radxa Rock2 board with a Ampak AP6335 (Broadcom 4339 core) it seems
the card responds very quickly most of the time, unfortunately during
initialisation it sometimes seems to take just a bit over 2 seconds to
respond.

This results intialization failing with message like:
  brcmf_c_preinit_dcmds: Retreiving cur_etheraddr failed, -52
  brcmf_bus_start: failed: -52
  brcmf_sdio_firmware_callback: dongle is not responding

Increasing the timeout to allow for a bit more headroom allows the
card to initialize reliably.

A quick search online after diagnosing/fixing this showed that Google
has a similar patch in their ChromeOS tree, so this doesn't seem
specific to the board I'm using.
Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: NJulian Calaby <julian.calaby@gmail.com>
Acked-by: NArend van Spriel <arend@broadcom.com>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Platform NVRAM (stored on a flash partition) has entries separated by a
NULL (\0) char. Our parsing code switches from VALUE state to IDLE
whenever it meets a NULL (\0). When that happens our IDLE handler should
simply consume it and analyze whatever is placed ahead.

This fixes harmless warnings spamming debugging output:
[  155.165624] brcmfmac: brcmf_nvram_handle_idle warning: ln=1:col=20: ignoring invalid character
[  155.180806] brcmfmac: brcmf_nvram_handle_idle warning: ln=1:col=44: ignoring invalid character
[  155.195971] brcmfmac: brcmf_nvram_handle_idle warning: ln=1:col=63: ignoring invalid character
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

On Broadcom ARM routers BCM4366 cards are available with 14e4:4365 ID.
Unfortunately this ID was already used by Broadcom for cards with
BCM43142, a totally different chipset requiring SoftMAC driver. To avoid
a conflict between brcmfmac and bcma use more specific ID entry with
subvendor and subdevice specified.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

On recent Broadcom chipsets PMU is present as separated core and it
can't be accessed using ChipCommon anymore as it fails with e.g.:
[   18.198412] Unhandled fault: imprecise external abort (0x1406) at 0xb6da200f

Add a new helper function that will return a proper core that should be
used for accessing PMU registers.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

This is an extra bitfield with info about some present hardware.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Separated PMU core can be found in new devices and should be used for
accessing PMU registers (which were routed through ChipCommon so far).
This core is one of exceptions that doesn't have or need wrapper address
to be still safely accessible.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

So far we were looking for address descriptors without a check for
crossing current component border. In case of dealing with unsupported
descriptor or descriptor missing at all the code would incorrectly get
data from another component.

Consider this binary-described component from BCM4366 EROM:
4bf83b01	TAG==CI		CID==0x83b
20080201	TAG==CI		PORTS==0+1	WRAPPERS==0+1
18400035	TAG==ADDR	SZ_SZD		TYPE_SLAVE
00050000
18107085	TAG==ADDR	SZ_4K		TYPE_SWRAP

Driver was assigning invalid base address to this core:
brcmfmac:  [6 ] core 0x83b:32 base 0x18109000 wrap 0x18107000
which came from totally different component defined in EROM:
43b36701	TAG==CI		CID==0x367
00000201	TAG==CI		PORTS==0+1	WRAPPERS==0+0
18109005	TAG==ADDR	SZ_4K		TYPE_SLAVE

This change will also allow us to support components without wrapper
address in the future.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

It seems 14e4:4365 pattern is too generic as there are two devices:
1) 14e4:4365 1028:0016 with SoftMAC BCM43142 chipset
2) 14e4:4365 14e4:4365 with FullMAC BCM4366 chipset
The later one was found in D-Link DIR-885L router and we want to let
brcmfmac handle it.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

It's another SoC with 32 GPIOs and simplified watchdog handling. It was
tested on D-Link DIR-885L.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

UART is connected to and controlled over ChipCommon core. It doesn't
have much to do with MIPS core (where we initialize it currently)
except just existing on embedded systemms. There isn't point of such
cross-core initialization (and we needed #ifdef anyway) so just handle
it in ChipCommon.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

First of all it changes the way we calculate primary channel offset. If
we use e.g. 80 MHz channel with primary frequency 5180 MHz (which means
center frequency is 5210 MHz) it makes sense to calculate primary offset
as -30 MHz.
Then it fixes values we compare primary_offset with. We were comparing
offset in MHz against -2 or 2 which was resulting in picking a wrong
primary channel.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

On recent Broadcom chipsets PMU is present as separated core and it
can't be accessed using ChipCommon anymore as it fails with e.g.:
[    0.000577] Unhandled fault: external abort on non-linefetch (0x1008) at 0xf1000604

Solve it by using a new (PMU) core pointer set to ChipCommon or PMU
depending on the hardware capabilities.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

PMU (Power Management Unit) seems to be a separated piece of hardware,
just accessed using ChipCommon core registers. In recent Broadcom
chipsets PMU is not bounded to CC but available as separated core.

To make code cleaner & easier to review (for a correct R/W access) use
clearer names.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Both cores are another exceptions. They are not accessed in a standard
way and to they don't need or have wrapping addresses.
This fixes bus scanning after finding such core.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Add missing defines and print proper names.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

It's a Macronix 32 MiB flash found on board with BCM47189 SoC.
Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

Merge tag 'iwlwifi-next-for-kalle-2016-01-31_2' of https://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next

Here's a first batch of patches for 4.6:
* continue the work on multiple Rx queues (Sara)
* add support for beacon storing
  used in low power states (Sara)
* cleanups (Rodrigo, Johannes)
* fix the LED behavior for iwldvm (Hubert)
* Use the regular firmware image of WoWLAN (Matti)
* fix 8000 devices for Big Endian machines (Johannes)
* more firmware debug hooks (Golan)
* add support for P2P Client snoozing (Avri)
* make the beacon filtering for AP mode configurable (Andrei)
* fix transmit queues overflow with LSO

When in AP mode we need to filter in beacons from other APs to update HT
operation mode. As a power optimization the beacons are filtered out when
there are no associated stations. As a result, when there are no
associated stations, we will not update the HT operation mode until a
station connects.
Add a debugfs parameter that allows to disable this optimization.
Signed-off-by: NAndrei Otcheretianski <andrei.otcheretianski@intel.com>
Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>

Final API of iwl_mpdu_desc has a change in the order of
the fields and does not include energy from the third
antenna (which is perfectly fine, since we don't have one).
Update the structure accordingly.
Signed-off-by: NSara Sharon <sara.sharon@intel.com>
Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>

Previous patches enabled new 9000 hardware DMA for one queue
only.
Enable the actual multi-queue path and configuration now.
This requires also per-queue NAPI struct.
Signed-off-by: NSara Sharon <sara.sharon@intel.com>
Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>

9000 series supports multi-queue rx. The hardware needs
to be configured with the hash functions to perform and
indirection table that maps hash results to the relevant
CPUs\queues.
Support this configuration.
Add debugfs hook to configure the indirection table in
order to enable performance analysis. The configuration
is stateless, receives a partial or full pattern and sends
the command to the firmware.
Signed-off-by: NSara Sharon <sara.sharon@intel.com>
Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>

Decreasing Tx power is allowed only when success ratio is
above the threshold defined in the algorithm. Add this condition.
Signed-off-by: NGregory Greenman <gregory.greenman@intel.com>
Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>

The 9000 hardware introduces the frame releaser, which
keeps track of the aggregation window and notifies host
of the window status. This requires in turn updating
the hardware with the RX BA session window size.
Firmware API was changed to enable that, update the driver
accordingly.
Signed-off-by: NSara Sharon <sara.sharon@intel.com>
Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>