- 24 6月, 2022 9 次提交
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由 Colin Ian King 提交于
There is a spelling mistake in a pr_debug message. Fix it. Signed-off-by: NColin Ian King <colin.i.king@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This reverts commit 92020e81. This causes stuttering and timeouts with DMCUB for some users so revert it until we understand why and safely enable it to save power. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1887Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
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由 Jiang Jian 提交于
there is an unexpected word 'for' in the comments that need to be dropped file - drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c line - 245 * position and also advance the position for for Vega10 changed to: * position and also advance the position for Vega10 Signed-off-by: NJiang Jian <jiangjian@cdjrlc.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nathan Chancellor 提交于
Clang warns: drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c:549:4: warning: misleading indentation; statement is not part of the previous 'else' [-Wmisleading-indentation] pll_req = dc_fixpt_from_int(pll_req_reg & clk_mgr->clk_mgr_mask->FbMult_int); ^ drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c:542:3: note: previous statement is here else ^ 1 warning generated. Indent this statement to the left, as it was clearly intended to be called unconditionally, which will fix the warning. Link: https://github.com/ClangBuiltLinux/linux/issues/1655 Fixes: 3e838f7c ("drm/amd/display: Get VCO frequency from registers") Signed-off-by: NNathan Chancellor <nathan@kernel.org> Reviewed-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Graham Sider 提交于
Update MES API to support oversubscription without aggregated doorbell for usermode queues. v2: Change oversubscription_no_aggregated_en to is_kfd_process (align with MES) Signed-off-by: NGraham Sider <Graham.Sider@amd.com> Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NJack Xiao <Jack.Xiao@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Graham Sider 提交于
Starting with GFX11, MES requires wptr BOs to be GTT allocated/mapped to GART for usermode queues in order to support oversubscription. In the case that work is submitted to an unmapped queue, MES must have a GART wptr address to determine whether the queue should be mapped. This change is accompanied with changes in MES and is applicable for MES_API_VERSION >= 2. v3: - Use amdgpu_vm_bo_lookup_mapping for wptr_bo mapping lookup - Move wptr_bo refcount increment to amdgpu_amdkfd_map_gtt_bo_to_gart - Remove list_del_init from amdgpu_amdkfd_map_gtt_bo_to_gart - Cleanup/fix create_queue wptr_bo error handling v4: - Add MES version shift/mask defines to amdgpu_mes.h - Change version check from MES_VERSION to MES_API_VERSION - Add check in kfd_ioctl_create_queue before wptr bo pin/GART map to ensure bo is a single page. Signed-off-by: NGraham Sider <Graham.Sider@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NPhilip Yang <Philip.Yang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Graham Sider 提交于
Store MES scheduler and MES KIQ version numbers in amdgpu_mes for GFX11. Signed-off-by: NGraham Sider <Graham.Sider@amd.com> Acked-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NJack Xiao <Jack.Xiao@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ruili Ji 提交于
amdgpu: [mmhub0] no-retry page fault (src_id:0 ring:40 vmid:8 pasid:32769, for process test_basic pid 3305 thread test_basic pid 3305) amdgpu: in page starting at address 0x00007ff990003000 from IH client 0x12 (VMC) amdgpu: VM_L2_PROTECTION_FAULT_STATUS:0x00840051 amdgpu: Faulty UTCL2 client ID: MP1 (0x0) amdgpu: MORE_FAULTS: 0x1 amdgpu: WALKER_ERROR: 0x0 amdgpu: PERMISSION_FAULTS: 0x5 amdgpu: MAPPING_ERROR: 0x0 amdgpu: RW: 0x1 When memory is allocated by kfd, no one triggers the tlb flush for MMHUB0. There is page fault from MMHUB0. v2:fix indentation v3:change subject and fix indentation Signed-off-by: NRuili Ji <ruiliji2@amd.com> Reviewed-by: NPhilip Yang <philip.yang@amd.com> Reviewed-by: NAaron Liu <aaron.liu@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jiang Jian 提交于
Remove the repeated word 'and' from comments Signed-off-by: NJiang Jian <jiangjian@cdjrlc.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 6月, 2022 5 次提交
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由 Ruijing Dong 提交于
Declare 'static', as the function is not intended to be used outside of this translation unit. Fixes: 4ed49c95 ("drm/amdgpu/vcn: add unified queue ib test") Reported-by: Nkernel test robot <lkp@intel.com> Reviewed-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NRuijing Dong <ruijing.dong@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Darren Powell 提交于
[v2] simplified fix after Lijo's feedback removed clocks.num_levels from calculation of loop count removed unsafe accesses to shim table freq_values retained corner case output only min,now if clocks.num_levels == 1 && now > min [v1] added a check to populate and use SCLK shim table freq_values only if using dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL or AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM removed clocks.num_levels from calculation of shim table size removed unsafe accesses to shim table freq_values output gfx_table values if using other dpm levels added check for freq_match when using freq_values for when now == min_clk == Test == LOGFILE=aldebaran-sclk.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_od_clk_voltage pp_dpm_sclk" for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: NDarren Powell <darren.powell@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Darren Powell 提交于
[v2] No Changes, added RB [v1] Size of pp_clock_levels_with_latency is PP_MAX_CLOCK_LEVELS, not MAX_NUM_CLOCKS. Both are currently defined as 16, modifying in case one value is modified in future Changed code in both arcturus and aldabaran. Also removed unneeded var count, and used min_t function Signed-off-by: NDarren Powell <darren.powell@amd.com> Reviewed-by: NLijo Lazar <lijo.lazar@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Philip Yang 提交于
After queue unmap or remove from MES successfully, free queue sysfs entries, doorbell and remove from queue list. Otherwise, application may destroy queue again, cause below kernel warning or crash backtrace. For outstanding queues, either application forget to destroy or failed to destroy, kfd_process_notifier_release will remove queue sysfs entries, kfd_process_wq_release will free queue doorbell. v2: decrement_queue_count for MES queue refcount_t: underflow; use-after-free. WARNING: CPU: 7 PID: 3053 at lib/refcount.c:28 Call Trace: kobject_put+0xd6/0x1a0 kfd_procfs_del_queue+0x27/0x30 [amdgpu] pqm_destroy_queue+0xeb/0x240 [amdgpu] kfd_ioctl_destroy_queue+0x32/0x70 [amdgpu] kfd_ioctl+0x27d/0x500 [amdgpu] do_syscall_64+0x35/0x80 WARNING: CPU: 2 PID: 3053 at drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:400 Call Trace: deallocate_doorbell.isra.0+0x39/0x40 [amdgpu] destroy_queue_cpsch+0xb3/0x270 [amdgpu] pqm_destroy_queue+0x108/0x240 [amdgpu] kfd_ioctl_destroy_queue+0x32/0x70 [amdgpu] kfd_ioctl+0x27d/0x500 [amdgpu] general protection fault, probably for non-canonical address 0xdead000000000108: Call Trace: pqm_destroy_queue+0xf0/0x200 [amdgpu] kfd_ioctl_destroy_queue+0x2f/0x60 [amdgpu] kfd_ioctl+0x19b/0x600 [amdgpu] Signed-off-by: NPhilip Yang <Philip.Yang@amd.com> Reviewed-by: NGraham Sider <Graham.Sider@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Philip Yang 提交于
We remove the user queue from MES scheduler to update queue properties. If the queue becomes active after updating, add the user queue to MES scheduler, to be able to handle command packet submission. v2: don't break pqm_set_gws Signed-off-by: NPhilip Yang <Philip.Yang@amd.com> Reviewed-by: NGraham Sider <Graham.Sider@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 6月, 2022 26 次提交
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由 Aurabindo Pillai 提交于
[Why&How] GCC 12 catches the following incorrect comparison in the if arm drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c: In function ‘dml32_ModeSupportAndSystemConfigurationFull’: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:3740:33: error: the comparison will always evaluate as ‘true’ for the address of ‘USRRetrainingSupport’ will never be NULL [-Werror=address] 3740 | || &mode_lib->vba.USRRetrainingSupport[i][j])) { | ^~ In file included from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_lib.h:32, from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dc.h:45, from drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:30: ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_vba.h:1175:14: note: ‘USRRetrainingSupport’ declared here 1175 | bool USRRetrainingSupport[DC__VOLTAGE_STATES][2]; | Fix this by remove preceding & so that value is compared instead of address Fixes: dda4fb85 ("drm/amd/display: DML changes for DCN32/321") Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
[Why&How] When the a 3d array is used by indexing with only one dimension in an if condition, the addresses get compared instead of the intended value stored in the array. GCC 12.1 caught this error: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c: In function ‘DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation’: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:1007:45: error: the comparison will always evaluate as ‘true’ for the address of ‘use_one_row_for_frame_flip’ will never be NULL [-Werror=address] 1007 | if (v->use_one_row_for_frame_flip[k]) { | ^ In file included from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_lib.h:32, from ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dc.h:45, from drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/dcn32/display_mode_vba_32.c:30: ./drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml/display_mode_vba.h:605:14: note: ‘use_one_row_for_frame_flip’ declared here 605 | bool use_one_row_for_frame_flip[DC__VOLTAGE_STATES][2][DC__NUM_DPP__MAX]; | Fix this by explicitly specifying the last two indices. Fixes: dda4fb85 ("drm/amd/display: DML changes for DCN32/321") Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jiang Jian 提交于
there is an unexpected word "the" in the comments that need to be dropped file: drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c line: 57 * the kernel tells the the ring what VMID to use for that command changed to * the kernel tells the ring what VMID to use for that command Signed-off-by: NJiang Jian <jiangjian@cdjrlc.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Use the correct adev variable for the drm_fb_helper in amdgpu_device_gpu_recover(). Noticed by inspection. Fixes: 087451f3 ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.") Reviewed-by: NGuchun Chen <guchun.chen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hans de Goede 提交于
The DRM_RADEON Kconfig code contains: select BACKLIGHT_CLASS_DEVICE So the condition these ifdefs test for is always true, drop them. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Yifan Zhang 提交于
sdma 6.0.1 has 8 queues instead of 2. Fixes: 26776a70 ("drm/amdkfd: add GC 11.0.1 KFD support") Signed-off-by: NYifan Zhang <yifan1.zhang@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NTim Huang <Tim.Huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hans de Goede 提交于
The DRM_AMDGPU Kconfig code contains: select BACKLIGHT_CLASS_DEVICE So the condition these ifdefs test for is always true, drop them. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Joshua Ashton 提交于
For DCN20 and above, the code that actually hooks up the provided input_color_space got lost at some point. Fixes COLOR_ENCODING and COLOR_RANGE doing nothing on DCN20+. Tested using Steam Remote Play Together + gamescope. Update other DCNs the same wasy DCN1.x was updates in commit a1e07ba8 ("drm/amd/display: Use plane->color_space for dpp if specified") Fixes: a1e07ba8 ("drm/amd/display: Use plane->color_space for dpp if specified") Signed-off-by: NJoshua Ashton <joshua@froggi.es> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aric Cyr 提交于
This DC patchset brings improvements in multiple areas. In summary, we highlight: - Remove unnecessary code; - Small fixes (compilation warnings, typos, etc); - Improvements in the DPMS code; - Fix eDP issues - Improvements in the MST code Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAric Cyr <aric.cyr@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
We already have DALSMC_MSG_TransferTableDram2Smu in the file dalsmc.h; for this reason, we don't need this definition in the smu msg file. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
In DCN32 clk hook functions, we are using the wrong reference for get_dp_ref_clk_frequency and missing the get_dtb_ref_clk_frequency reference. This commit adds those references. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chaitanya Dhere 提交于
[Why] For DCN32 we do not have a pme workaround function defined that sends a BacoAudio message. Default code had uses the DCN30 function for pme workaround. PMFW headers are inconsistent with their message ID definitions which cause ID's to clash leading to inconsistent system behaviour. There is a clash with FCLK message due to inconsitent PMFW headers. [How] Implement a new BacoAudio function to workaround the problem of inconsistent PMFW headers in order to avoid BacoAudio message clasing with FCLK Enable message. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NChaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
Add support to get VCO frequency from registers. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alvin Lee 提交于
FCLK not supported for DCN321, but still need to update the software state accordingly to prevent unneeded full updates in driver Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 George Shen 提交于
[Why] Certain use cases will pass in zero in the new_clocks parameter for all clocks. This results in a divide-by-zero error when attempting to round up the new clock. When new_clocks are zero, no rounding is required, so we can skip it. [How] Guard the division calculation with a check to make sure clocks are not zero. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NGeorge Shen <george.shen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alvin Lee 提交于
[Description] - When lowering DPPCLK, we want to program the DPP DTO before updating the DPP refclk. - Also update DPPCLK to the exact frequency that will be set after clock divider has been programmed. This will prevent rounding errors when making the request to PMFW (we need DPP DTO to match exactly with the exact DPP refclk). Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
Our debug struct has the min_disp_clk_khz and min_dpp_clk_khz options, which we ignore in the DCN32. This commit introduces those checks and the necessary calculation. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dmytro Laktyushkin 提交于
[Why & How] Check if aux is not accessible before updating payload allocation table. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wenjing Liu 提交于
[Why & How] Extract update stream allocation table into link hwss as part of the link hwss refactor work. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NGeorge Shen <George.Shen@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWenjing Liu <wenjing.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 George Shen 提交于
[Why & How] Old vendor specific w/a are no longer needed and unused. Clean up codebase by removing them. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NGeorge Shen <george.shen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 George Shen 提交于
[Why] Several issues were discovered that caused link training to fail when an LTTPR device is connected downstream for the fixed VS sequence. [How] The following were added: - workaround to configure AUX timeout for fixed VS sequence - additional delay before disabling fixed VS intercept - detection of fixed VS deadlock state and performing DPCD sequence to recover Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NMeenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NGeorge Shen <George.Shen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 George Shen 提交于
[Why] The function currently skips overriding the drive settings of the first lane. [How] Change for loop to start at 0 instead of 1. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NGeorge Shen <george.shen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aric Cyr 提交于
[Why & How] Change struct initializer from multiple brace to single brace. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NAric Cyr <aric.cyr@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wenjing Liu 提交于
[why] This is one of the major steps to decouple hw lane settings from dpcd lane settings. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NJun Lei <Jun.Lei@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWenjing Liu <wenjing.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 George Shen 提交于
[Why & How] Check always_match_dpcd_with_hw_lane_settings bit before overriding the DP drive settings Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NGeorge Shen <george.shen@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wenjing Liu 提交于
[Why & How] Enrich the log to provide more informatio in MST payload update. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: NAriel Bernstein <Eric.Bernstein@amd.com> Acked-by: NAlan Liu <HaoPing.Liu@amd.com> Signed-off-by: NWenjing Liu <wenjing.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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