1. 25 5月, 2010 7 次提交
  2. 22 5月, 2010 1 次提交
  3. 18 5月, 2010 1 次提交
  4. 14 5月, 2010 1 次提交
    • J
      drivers/net: Remove unnecessary returns from void function()s · a4b77097
      Joe Perches 提交于
      This patch removes from drivers/net/ all the unnecessary
      return; statements that precede the last closing brace of
      void functions.
      
      It does not remove the returns that are immediately
      preceded by a label as gcc doesn't like that.
      
      It also does not remove null void functions with return.
      
      Done via:
      $ grep -rP --include=*.[ch] -l "return;\n}" net/ | \
        xargs perl -i -e 'local $/ ; while (<>) { s/\n[ \t\n]+return;\n}/\n}/g; print; }'
      
      with some cleanups by hand.
      
      Compile tested x86 allmodconfig only.
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a4b77097
  5. 13 5月, 2010 9 次提交
  6. 12 5月, 2010 3 次提交
    • V
    • V
      ath9k: Fix bug in handling rx frames with invalid descriptor content · 083e3e8d
      Vasanthakumar Thiagarajan 提交于
      Don't send them for further processing.
      Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      083e3e8d
    • L
      ath9k_hw: new initialization values for AR9003 · 7fca8e26
      Luis R. Rodriguez 提交于
      These changes include:
      
        * For PAPRD, the TXRF3.capdiv5G, TXRF3.rdiv5G and TXRF3.rdiv2G
          are set to 0x0, the TXRF6.capdiv2G is set to 0x2 for all
          three chains.
        * The d2cas5G/d3cas5G/d4cas5G was updated to 4/4/4 in lowest_ob_db
          Tx gain table.
        * To improve DPPM, three parameters were updated (Released from Madhan):
      	1. RANGE_OSDAC is set to 0x1 for 2G, 0x0 for 5G
      	2. offsetC1 is set to 0xc
      	3. inv_clk320_adc is set to 0x1
        * To reduce PHY error(from spur), cycpwr_thr1 and cycpwr_thr1_ext
          are increased to 0x8 at 2G.
        * The 2G Rx gain tables are updated with mixer gain setting 3,1,0.
      
      The new checksums yield:
      
      initvals -f ar9003
      0x00000000c2bfa7d5        ar9300_2p0_radio_postamble
      0x00000000ada2b114        ar9300Modes_lowest_ob_db_tx_gain_table_2p0
      0x00000000e0bc2c84        ar9300Modes_fast_clock_2p0
      0x00000000056eaf74        ar9300_2p0_radio_core
      0x0000000000000000        ar9300Common_rx_gain_table_merlin_2p0
      0x0000000078658fb5        ar9300_2p0_mac_postamble
      0x0000000023235333        ar9300_2p0_soc_postamble
      0x0000000054d41904        ar9200_merlin_2p0_radio_core
      0x00000000748572cf        ar9300_2p0_baseband_postamble
      0x000000009aa5a0a4        ar9300_2p0_baseband_core
      0x000000003df9a326        ar9300Modes_high_power_tx_gain_table_2p0
      0x000000001cfba124        ar9300Modes_high_ob_db_tx_gain_table_2p0
      0x0000000011302700        ar9300Common_rx_gain_table_2p0
      0x00000000e3eab114        ar9300Modes_low_ob_db_tx_gain_table_2p0
      0x00000000c9d66d40        ar9300_2p0_mac_core
      0x000000001e1d0800        ar9300Common_wo_xlna_rx_gain_table_2p0
      0x00000000a0c54980        ar9300_2p0_soc_preamble
      0x00000000292e2544        ar9300PciePhy_pll_on_clkreq_disable_L1_2p0
      0x000000002d3e2544        ar9300PciePhy_clkreq_enable_L1_2p0
      0x00000000293e2544        ar9300PciePhy_clkreq_disable_L1_2p0
      
      Cc: Don Breslin <don.breslin@atheros.com>
      Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      7fca8e26
  7. 11 5月, 2010 3 次提交
  8. 08 5月, 2010 6 次提交
  9. 29 4月, 2010 2 次提交
  10. 28 4月, 2010 7 次提交