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  1. 26 6月, 2015 4 次提交
  3. 22 6月, 2015 2 次提交
    • L
      MAINTAINERS: Add Arnd Bergmann as Syscon reviewer · 6c284c9a
      由 Lee Jones 提交于 
      The System Configuration (syscon) driver is an important one, which
effects many ARM-SoC based platforms.  I'm adding Arnd as a primary
reviewer as he is highly competent in this area and has a keen
interest in ARM-SoC.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
      6c284c9a
    • K
      MAINTAINERS: Extend Samsung MFD drivers entry and add Krzysztof Kozlowski · b40f0632
      由 Krzysztof Kozlowski 提交于 
      Extend the entry for Samsung MFD drivers for PMIC devices (Power
Management Integrated Circuit) with bindings documentation, clock
(clk-s2mps11.c) and RTC drivers (rtc-s5m.c).

These PMIC devices are used on many Exynos-based boards like Arndale
Octa (S2MPS11), Gear 2 (S2MPS14).

Add Krzysztof Kozlowski as a supporter for reviewing them.
I am not the author of these drivers. However I have recently
contributed to most of them and I have access to datasheets and hardware.

Cc: Sangbeom Kim <sbkim73@samsung.com>
CC: Mike Turquette <mturquette@linaro.org>
CC: Stephen Boyd <sboyd@codeaurora.org>
CC: Alessandro Zummo <a.zummo@towertech.it>
CC: Alexandre Belloni <alexandre.belloni@free-electrons.com>
CC: Liam Girdwood <lgirdwood@gmail.com>
CC: Mark Brown <broonie@kernel.org>
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
      b40f0632
  5. 20 6月, 2015 1 次提交
  7. 19 6月, 2015 1 次提交
  9. 17 6月, 2015 1 次提交
  11. 15 6月, 2015 2 次提交
    • D
      crypto: nx - move include/linux/nx842.h into drivers/crypto/nx/nx-842.h · 32be6d3e
      由 Dan Streetman 提交于 
      Move the contents of the include/linux/nx842.h header file into the
drivers/crypto/nx/nx-842.h header file.  Remove the nx842.h header
file and its entry in the MAINTAINERS file.

The include/linux/nx842.h header originally was there because the
crypto/842.c driver needed it to communicate with the nx-842 hw
driver.  However, that crypto compression driver was moved into
the drivers/crypto/nx/ directory, and now can directly include the
nx-842.h header.  Nothing else needs the public include/linux/nx842.h
header file, as all use of the nx-842 hardware driver will be through
the "842-nx" crypto compression driver, since the direct nx-842 api is
very limited in the buffer alignments and sizes that it will accept,
and the crypto compression interface handles those limitations and
allows any alignment and size buffers.
Signed-off-by: NDan Streetman <ddstreet@ieee.org>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      32be6d3e
    • S
      MAINTAINERS: remove rt2x00.serialmonkey.com list and web page · 3bdb4a4e
      由 Stanislaw Gruszka 提交于 
      rt2x00.serialmonkey.com will be shutdown.

Since traffic on rt2x00 mailing list is very low, we can use only
linux-wireless list for any rt2x00 related topics.

Thanks for Luis Correia, Ivo van Doorn and Mark Wallis for maintaining
rt2x00 servers for years!
Signed-off-by: NStanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
      3bdb4a4e
  13. 11 6月, 2015 1 次提交
  15. 06 6月, 2015 1 次提交
    • D
      PCI: xgene: Add APM X-Gene v1 PCIe MSI/MSIX termination driver · dcd19de3
      由 Duc Dang 提交于 
      APM X-Gene v1 SoC supports its own implementation of MSI, which is not
compliant to GIC V2M specification for MSI Termination.

There is a single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports.
This MSI block supports 2048 MSI termination ports coalesced into 16
physical HW IRQ lines and shared across all 5 PCIe ports.

As there are only 16 HW IRQs to serve 2048 MSI vectors, to support
set_affinity correctly for each MSI vectors, the 16 HW IRQs are statically
allocated to 8 X-Gene v1 cores (2 HW IRQs for each cores).  To steer MSI
interrupt to target CPU, MSI vector is moved around these HW IRQs lines.
With this approach, the total MSI vectors this driver supports is reduced
to 256.

[bhelgaas: squash doc, driver, maintainer update]
Signed-off-by: NDuc Dang <dhdang@apm.com>
Signed-off-by: NTanmay Inamdar <tinamdar@apm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com>
      dcd19de3
  17. 04 6月, 2015 2 次提交
  19. 03 6月, 2015 1 次提交
  21. 02 6月, 2015 1 次提交
    • G
      gpio: Add GPIO support for Broadcom STB SoCs · 3b0213d5
      由 Gregory Fong 提交于 
      This adds support for the GPIO IP "UPG GIO" used on
Broadcom STB SoCs (BCM7XXX and some others). Uses
basic_mmio_gpio to instantiate a gpio_chip for each bank.
The driver assumes that it handles the base set of GPIOs
on the system and that it can start its numbering sequence
from 0, so any GPIO expanders used with it must dynamically
assign GPIO numbers after this driver has finished
registering its GPIOs.

Does not implement the interrupt-controller portion yet,
will be done in a future commit.

v2:
- change include to use <linux/gpio/driver.h> instead of
  <linux/gpio.h>
- get rid of unnecessary imask member in struct bank
- rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
- always have 32 GPIOs per bank and add 'width' member in
  struct bank to hold actual number of GPIOs in use
- mark of_match table as const
List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b0213d5
  23. 01 6月, 2015 1 次提交
  25. 31 5月, 2015 1 次提交
  27. 29 5月, 2015 4 次提交
  29. 28 5月, 2015 3 次提交
  31. 26 5月, 2015 1 次提交
  33. 19 5月, 2015 3 次提交
  35. 18 5月, 2015 1 次提交
  37. 16 5月, 2015 3 次提交
  39. 15 5月, 2015 3 次提交
  41. 12 5月, 2015 3 次提交