- 21 3月, 2012 1 次提交
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由 Mike Frysinger 提交于
No other SPI controller has this field, and SPI clients should be setting this up in their own drivers. So drop it from the Blackfin controller to keep people from using it. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NBob Liu <lliubbo@gmail.com>
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- 25 10月, 2010 1 次提交
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 23 10月, 2010 1 次提交
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 18 10月, 2010 4 次提交
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由 Mike Frysinger 提交于
While combining things, also switch to the proper SPI bit define names. This lets us punt the rarely used SPI defines. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Barry Song 提交于
The common SPI layers take care of detecting CS conflicts and preventing two devices from claiming the same CS. This causes problems for the GPIO CS support we currently have as we are using CS0 to mean "GPIO CS". But if we have multiple devices using a GPIO CS, the common SPI layers see multiple devices using the virtual "CS0" and reject any such attempts. To make both work, we introduce an offset define. This represents the max number of hardware CS values that the SPI peripheral supports. If the CS is below this limit, we know we can use the hardware CS. If it's above, we treat it as a GPIO CS. This keeps the CS unique as seen by the common code and prevents conflicts. Signed-off-by: NBarry Song <barry.song@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Expand the BIT_CTL defines to use the naming convention of the hardware, and expand the masks to cover all documented bits. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
As David points out, the cs_change_per_word option isn't standard, nor is anyone actually using it. So punt all of the dead code considering it makes up ~10% of the code size. Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 07 10月, 2009 1 次提交
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由 Robin Getz 提交于
Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: NRobin Getz <robin.getz@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 17 9月, 2009 1 次提交
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由 Yi Li 提交于
Signed-off-by: NYi Li <yi.li@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 07 4月, 2009 3 次提交
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由 Wolfgang Muees 提交于
1. Rewrite of the non-dma data transfer functions to use only ONE mode of TIMOD (TIMOD=0x1). With TIMOD=0, it was not possible to set the TX bit pattern. So the TDBR = 0xFFFF inside the read calls won't work. 2. Clear SPI_RDBR before reading and before duplex transfer. Otherwise the garbage data in RDBR will get read. Since mmc_spi uses a lot of duplex transfers, this is the main cause of mmc_spi failure. 3. Poll RXS for transfer completion. Polling SPIF or TXS cannot guarantee transfer completion. This may interrupt a transfer before it is finished. Also this may leave garbage data in buffer and affect next transfer. [Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct bfin5xx_spi_chip" to specify the value to transmit if no TX value is supplied.] Signed-off-by: NWolfgang Muees <wolfgang.mues@auerswald.de> Signed-off-by: NYi Li <yi.li@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Michael Hennerich 提交于
Add support for GPIO controlled SPI Chip Selects. To make use of this feature, set chip_select = 0 and add a proper cs_gpio to your controller_data. struct spi_board_info .chip_select = 0 struct bfin5xx_spi_chip .cs_gpio = GPIO_P### There are various SPI devices that require SPI MODE_0, and need to have the Chip Selects asserted during the entire transfer. Consider using SPI_MODE_3 (SPI_CPHA | SPI_CPOL) if your device allows it. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Michael Hennerich 提交于
Fix erroneous SPI Clock divisor calculation. Make sure SPI_BAUD is always >= 2. Writing a value of 0 or 1 to the SPI_BAUD register disables the serial clock. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org> Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 28 3月, 2009 1 次提交
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由 Cliff Cai 提交于
Signed-off-by: NCliff Cai <cliff.cai@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
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- 07 1月, 2009 1 次提交
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由 Mike Frysinger 提交于
use scm changelog rather than comment blocks in files Signed-off-by: NMike Frysinger <vapier.adi@gmail.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
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- 27 8月, 2008 1 次提交
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由 Bryan Wu 提交于
Signed-off-by: NBryan Wu <cooloney@kernel.org>
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- 09 2月, 2008 1 次提交
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由 Michael Hennerich 提交于
- Enable kernel generic spidev driver for blackfin SPI ADC - spi_adc driver, document and test sample not synced Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
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- 06 12月, 2007 2 次提交
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由 Bryan Wu 提交于
Remove some sort of bloaty code, try to get these pin_req arrays built at compile-time - move this static things to the blackfin board file - add pin_req array to struct bfin5xx_spi_master - tested on BF537/BF548 with SPI flash Signed-off-by: NBryan Wu <bryan.wu@analog.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Bryan Wu 提交于
Move cs_chg_udelay handling (specific to this driver) to cs_deactive(), fixing a bug when some SPI LCD driver needs delay after cs_deactive. Fix bug reported by Cameron Barfield <cbarfield@cyberdata.net> https://blackfin.uclinux.org/gf/project/uclinux-dist/forum/?action=ForumBrowse&forum_id=39&_forum_action=ForumMessageBrowse&thread_id=23630&feedback=Message%20replied. Cc: Cameron Barfield <cbarfield@cyberdata.net> Signed-off-by: NBryan Wu <bryan.wu@analog.com> Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 11 10月, 2007 1 次提交
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由 Bryan Wu 提交于
Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use the new REGBASE for board platform resources Signed-off-by: NBryan Wu <bryan.wu@analog.com>
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- 08 5月, 2007 1 次提交
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由 Bryan Wu 提交于
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: NBryan Wu <bryan.wu@analog.com> Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: NAubrey Li <aubrey.li@analog.com> Signed-off-by: NJie Zhang <jie.zhang@analog.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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