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  1. 20 10月, 2015 2 次提交
  3. 16 10月, 2015 1 次提交
    • J
      i40e/i40evf: moderate interrupts differently · ac26fc13
      由 Jesse Brandeburg 提交于 
      The XL710 hardware has a different interrupt moderation design
that can support a limit of total interrupts per second per
vector, in addition to the "number of interrupts per second"
controls already established in the driver.  This combination
of hardware features allows us to set very low default latency
settings but minimize the total CPU utilization by not
making too many interrupts, should the user desire.

The current driver implementation is still enabling the dynamic
moderation in the driver, and only using the rx/tx-usecs
limit in ethtool to limit the interrupt rate per second, by default.

The new code implemented in this patch
2) adds init/use of the new "Interrupt Limit" register
3) adds ethtool knob to control/report the limits above

Usage is ethtool -C ethx rx-usecs-high <value> Where <value> is number
of microseconds to create a rate of 1/N interrupts per second,
regardless of rx-usecs or tx-usecs values. Since there is a credit based
scheme in the hardware, the rx-usecs and tx-usecs can be configured for
very low latency for short bursts, but once the credit runs out the
refill rate on the credits is limited by rx-usecs-high.

Change-ID: I3a1075d3296123b0f4f50623c779b027af5b188d
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      ac26fc13
  5. 09 10月, 2015 1 次提交
  7. 08 10月, 2015 1 次提交
  9. 30 9月, 2015 1 次提交
    • J
      i40e: fix 32 bit build warnings · 9c70d7ce
      由 Jesse Brandeburg 提交于 
      Sparse found some issues with 32 bit compilation, which probably should
at least work without warning.  Not only that, but the code was wrong.
Thanks sparse!!

And thanks to the kbuild robot zero day testing for finding this issue.

$ make ARCH=i386 M=drivers/net/ethernet/intel/i40e C=2 CF="-D__CHECK_ENDIAN__"
  CHECK   drivers/net/ethernet/intel/i40e/i40e_main.c
  include/linux/etherdevice.h:79:32: warning: restricted __be16 degrades to integer
  drivers/net/ethernet/intel/i40e/i40e_main.c:7565:17: warning: shift too big (32) for type unsigned long
  drivers/net/ethernet/intel/i40e/i40e_main.c:7565:17: warning: shift too big (42) for type unsigned long
  drivers/net/ethernet/intel/i40e/i40e_main.c:7565:17: warning: shift too big (39) for type unsigned long
  drivers/net/ethernet/intel/i40e/i40e_main.c:7565:17: warning: shift too big (40) for type unsigned long

CC: kbuild-all@01.org
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Reported-by: Nkbuild test robot <fengguang.wu@intel.com>
Tested-by: NAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      9c70d7ce
  11. 29 9月, 2015 3 次提交
  13. 06 8月, 2015 3 次提交
  15. 23 7月, 2015 1 次提交
  17. 28 5月, 2015 2 次提交
  19. 26 2月, 2015 1 次提交
  21. 24 2月, 2015 1 次提交
    • M
      i40e/i40evf: Refactor the receive routines · a132af24
      由 Mitch Williams 提交于 
      Split the receive hot path code into two, one for packet split and one
for single buffer. This improves receive performance since we only need
to check if the ring is in packet split mode once per NAPI poll time,
not several times per packet. The single buffer code is further improved
by the removal of a bunch of code and several variables that are not
needed. On a receive-oriented test this can improve single-threaded
throughput.

Also refactor the packet split receive path to use a fixed buffer for
headers, like ixgbe does. This vastly reduces the number of DMA mappings
and unmappings we need to do, allowing for much better performance in
the presence of an IOMMU.

Lastly, correct packet split descriptor types now that we are actually
using them.

Change-ID: I3a194a93af3d2c31e77ff17644ac7376da6f3e4b
Signed-off-by: NMitch Williams <mitch.a.williams@intel.com>
Tested-by: NJim Young <james.m.young@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      a132af24
  23. 07 1月, 2015 1 次提交
    • J
      i40e: fix un-necessary Tx hangs · d91649f5
      由 Jesse Brandeburg 提交于 
      When the driver was polling with interrupts disabled the hardware
will occasionally not write back descriptors.  This patch causes
the driver to detect this situation and force an interrupt to
fire which will flush the stuck descriptor.  Does not conflict
with napi because if we are already polling the napi_schedule is
ignored.  Additionally the extra interrupts are rate limited, so
don't cause a burden to the CPU.

Change-ID: Iba4616d2a71288672a5f08e4512e2704b97335e8
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      d91649f5
  25. 11 11月, 2014 1 次提交
  27. 27 8月, 2014 1 次提交
  29. 03 8月, 2014 1 次提交
  31. 03 7月, 2014 1 次提交
  33. 25 6月, 2014 1 次提交
  35. 08 6月, 2014 1 次提交
    • J
      i40e/i40evf: fix TSO accounting · 980093eb
      由 Jesse Brandeburg 提交于 
      The TSO logic in the transmit path had some assumptions that
have been broken now that the kernel can send as much as 32kB
in a single skb->frag[.] entry, even on a system with 4kB pages.

This fixes the assumptions and allows the kernel to operate
as efficiently as possible with both SENDFILE and SEND.

In addition, the hardware limit of data contained in a descriptor is
changed to the next power of two below where it currently is in
order to align to a power of two value, preventing a single byte
of data in a descriptor.

Change-ID: I6af1f0b87c1458e10644dbd47541591075a52651
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      980093eb
  37. 05 6月, 2014 1 次提交
  39. 29 5月, 2014 2 次提交
  41. 11 1月, 2014 2 次提交
  43. 09 1月, 2014 2 次提交
  45. 05 1月, 2014 1 次提交
  47. 04 1月, 2014 1 次提交
  49. 10 12月, 2013 1 次提交
  51. 10 10月, 2013 6 次提交