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  1. 13 5月, 2015 1 次提交
  3. 10 5月, 2015 1 次提交
  5. 06 5月, 2015 2 次提交
  7. 17 4月, 2015 1 次提交
    • M
      cxgb4: drop __GFP_NOFAIL allocation · f72f116a
      由 Michal Hocko 提交于 
      set_filter_wr is requesting __GFP_NOFAIL allocation although it can return
ENOMEM without any problems obviously (t4_l2t_set_switching does that
already).  So the non-failing requirement is too strong without any
obvious reason.  Drop __GFP_NOFAIL and reorganize the code to have the
failure paths easier.

The same applies to _c4iw_write_mem_dma_aligned which uses __GFP_NOFAIL
and then checks the return value and returns -ENOMEM on failure.  This
doesn't make any sense what so ever.  Either the allocation cannot fail or
it can.

del_filter_wr seems to be safe as well because the filter entry is not
marked as pending and the return value is propagated up the stack up to
c4iw_destroy_listen.
Signed-off-by: NMichal Hocko <mhocko@suse.cz>
Cc: David Rientjes <rientjes@google.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Dave Chinner <david@fromorbit.com>
Cc: "Theodore Ts'o" <tytso@mit.edu>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Hariprasad S <hariprasad@chelsio.com>
Cc: Jan Kara <jack@suse.cz>
Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f72f116a
  9. 15 4月, 2015 1 次提交
  11. 08 4月, 2015 1 次提交
  13. 02 4月, 2015 1 次提交
  15. 30 3月, 2015 2 次提交
  17. 25 3月, 2015 1 次提交
  19. 20 3月, 2015 1 次提交
  21. 09 3月, 2015 1 次提交
  23. 06 3月, 2015 2 次提交
  25. 10 2月, 2015 1 次提交
  27. 05 2月, 2015 2 次提交
  29. 28 1月, 2015 1 次提交
  31. 27 1月, 2015 2 次提交
  33. 16 1月, 2015 1 次提交
  35. 14 1月, 2015 1 次提交
  37. 13 1月, 2015 2 次提交
  39. 09 1月, 2015 1 次提交
  41. 06 1月, 2015 4 次提交
  43. 13 12月, 2014 1 次提交
  45. 12 12月, 2014 1 次提交
  47. 11 12月, 2014 1 次提交
  49. 10 12月, 2014 1 次提交
  51. 09 12月, 2014 1 次提交
    • E
      ethtool: Support for configurable RSS hash function · 892311f6
      由 Eyal Perry 提交于 
      This patch extends the set/get_rxfh ethtool-options for getting or
setting the RSS hash function.

It modifies drivers implementation of set/get_rxfh accordingly.

This change also delegates the responsibility of checking whether a
modification to a certain RX flow hash parameter is supported to the
driver implementation of set_rxfh.

User-kernel API is done through the new hfunc bitmask field in the
ethtool_rxfh struct. A bit set in the hfunc field is corresponding to an
index in the new string-set ETH_SS_RSS_HASH_FUNCS.

Got approval from most of the relevant driver maintainers that their
driver is using Toeplitz, and for the few that didn't answered, also
assumed it is Toeplitz.

Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Ariel Elior <ariel.elior@qlogic.com>
Cc: Prashant Sreedharan <prashant@broadcom.com>
Cc: Michael Chan <mchan@broadcom.com>
Cc: Hariprasad S <hariprasad@chelsio.com>
Cc: Sathya Perla <sathya.perla@emulex.com>
Cc: Subbu Seetharaman <subbu.seetharaman@emulex.com>
Cc: Ajit Khaparde <ajit.khaparde@emulex.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>
Cc: Bruce Allan <bruce.w.allan@intel.com>
Cc: Carolyn Wyborny <carolyn.wyborny@intel.com>
Cc: Don Skidmore <donald.c.skidmore@intel.com>
Cc: Greg Rose <gregory.v.rose@intel.com>
Cc: Matthew Vick <matthew.vick@intel.com>
Cc: John Ronciak <john.ronciak@intel.com>
Cc: Mitch Williams <mitch.a.williams@intel.com>
Cc: Amir Vadai <amirv@mellanox.com>
Cc: Solarflare linux maintainers <linux-net-drivers@solarflare.com>
Cc: Shradha Shah <sshah@solarflare.com>
Cc: Shreyas Bhatewara <sbhatewara@vmware.com>
Cc: "VMware, Inc." <pv-drivers@vmware.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: NEyal Perry <eyalpe@mellanox.com>
Signed-off-by: NAmir Vadai <amirv@mellanox.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      892311f6
  53. 03 12月, 2014 1 次提交
  55. 26 11月, 2014 1 次提交
    • H
      cxgb4/cxgb4vf/csiostor: Add T4/T5 PCI ID Table · 3fedeab1
      由 Hariprasad Shenai 提交于 
      Add a new file t4_pci_id_tbl.h that contains T4/T5 PCI ID Table so that for all
drivers that uses T4/T5 PCI functions changes can be done in one place.

checkpatch.pl script reports following error, which if tried to fix ends up in
compilation error.

	ERROR: Macros with complex values should be enclosed in parentheses
	+#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END \
	+		{ 0, } \
	+	}

	WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
	new file mode 100644

	ERROR: Macros with complex values should be enclosed in parentheses
	+#define CH_PCI_ID_TABLE_FENTRY(devid) \
	+	CH_PCI_ID_TABLE_ENTRY((devid) | \
	+			      ((CH_PCI_DEVICE_ID_FUNCTION) << 8)), \
	+	CH_PCI_ID_TABLE_ENTRY((devid) | \
	+			      ((CH_PCI_DEVICE_ID_FUNCTION2) << 8))

	ERROR: Macros with complex values should be enclosed in parentheses
	+#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END { 0, } }

	ERROR: Macros with complex values should be enclosed in parentheses
	+#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END { 0, } }
Signed-off-by: NHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3fedeab1
  57. 23 11月, 2014 3 次提交