We need to detect the SoC revision early, but the SoC
feature detection can be done later on. In order to allow
further clean-up later on, this patch separates the SoC
revision check from the SoC feature check.

This patch doesn't change functionality or behavior of the code
execution; it barely cleans up the code and splits into SoC
specific implementation for Rev ID and feature detection.
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

As part of omap revision code cleanup, make cpu_rev
variable static global to the file (id.c). This is
needed so we can split the SoC detection from SoC
feature detection in the following patch. Also move
omap3_cpuinfo function a bit as that will be shared
by other omap3 like SoCs.
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds cpu type, macros for identification of TI814X device.
Signed-off-by: NHemant Pedanekar <hemantp@ti.com>
[tony@atomide.com: left out CK_TI814X for now]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch updates existing macros, functions used for TI816X, to enable
addition of other SoCs belonging to TI81XX family (e.g., TI814X).

The approach taken is to use TI81XX/ti81xx for code/data going to be common
across all TI81XX devices.

cpu_is_ti81xx() is introduced to handle code common across TI81XX devices.

In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved
in mach-omap2/common.c as same will be used for TI814X and is not board
specific.
Signed-off-by: NHemant Pedanekar <hemantp@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add support for detection of the next chip in the OMAP4 family: OMAP4470 ES1.0

For more details on OMAP4470, visit:
http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12869&contentId=123362Signed-off-by: NLeonid Iziumtsev <x0153368@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

allow for the omap4430 es2.3 revision to be recognized in the
omap4_check_revision() function.

most aspects of all omap4430 es2.x versions are identical, however
a number of small variations such as default pullup or pulldown
resistor configurations vary between revisions.

detailed information on silicon errata for omap4430 revisions can
be found at http://focus.ti.com/pdfs/wtbu/swpz009D.pdfSigned-off-by: NDavid Anders <x0132446@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch updates the common machine specific source files for
support for AM33XX/AM335x with cpu type, macros for identification of
AM33XX/AM335X device.
Signed-off-by: NAfzal Mohammed <afzal@ti.com>
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
[tony@atomide.com: updated for map_io and common.h changes, dropped CK_AM33XX]
Signed-off-by: NTony Lindgren <tony@atomide.com>

As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>,
there's no need to keep local prototypes in non-local headers.

Add mach-omap1/common.h and mach-omap2/common.h and move the
local prototypes there from plat/common.h and mach/omap4-common.h.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The way that we detect which OMAP3 chips support I/O wakeup and
software I/O chain clock control is broken.

Currently, I/O wakeup is marked as present for all OMAP3 SoCs other
than the AM3505/3517.  The TI81xx family of SoCs are at present
considered to be OMAP3 SoCs, but don't support I/O wakeup.  To resolve
this, convert the existing blacklist approach to an explicit,
whitelist support, in which only SoCs which are known to support I/O
wakeup are listed.  (At present, this only includes OMAP34xx,
OMAP3503, OMAP3515, OMAP3525, OMAP3530, and OMAP36xx.)

Also, the current code incorrectly detects the presence of a
software-controllable I/O chain clock on several chips that don't
support it.  This results in writes to reserved bitfields, unnecessary
delays, and console messages on kernels running on those chips:

    http://www.spinics.net/lists/linux-omap/msg58735.html

Convert this test to a feature test with a chip-by-chip whitelist.

Thanks to Dave Hylands <dhylands@gmail.com> for reporting this problem
and doing some testing to help isolate the cause.  Thanks to Steve
Sakoman <sakoman@gmail.com> for catching a bug in the first version of
this patch.  Thanks to Russell King <linux@arm.linux.org.uk> for
comments.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Dave Hylands <dhylands@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Tested-by: NSteve Sakoman <sakoman@gmail.com>
Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Now that all of the users of the OMAP_CHIP bitfield code have been converted
to use lists, the OMAP_CHIP code, data, and declarations can be removed.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

omap3_cpuinfo() contains essentially duplicated code from
omap3_check_revision(), just for the purpose of determining the chip ES level.
Set the cpu_rev char array pointer in omap3_check_revision() instead,
and drop the now-useless code from omap3_cpuinfo().
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NIgor Grinberg <grinberg@compulab.co.il>
Tested-by: NAbhilash Koyamangalath <abhilash.kv@ti.com>

Emit a warning to the console in omap3_check_revision() if that code
cannot determine what type of SoC the system is currently running on.

Remove some extra whitespace, remove some duplicate code, and
add an appropriate comment to a fallthrough case.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Hemant Pedanekar <hemantp@ti.com>
Tested-by: NIgor Grinberg <grinberg@compulab.co.il>
Tested-by: NAbhilash Koyamangalath <abhilash.kv@ti.com>

Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest
of the OMAP2+ SoCs do in mach-omap2/cpu.c.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Tested-by: NIgor Grinberg <grinberg@compulab.co.il>
Tested-by: NAbhilash Koyamangalath <abhilash.kv@ti.com>

omap3_cpuinfo() is filled with useless strcpy() calls; remove them.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Tested-by: NIgor Grinberg <grinberg@compulab.co.il>
Tested-by: NAbhilash Koyamangalath <abhilash.kv@ti.com>

The OMAP3505/AM3505 appears to be based on the same silicon as the
OMAP3517/AM3517, with some features disabled via eFuse bits.  Follow
the same practice as OMAP3430 and identify these devices internally as
part of the OMAP3517/AM3517 family.

The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon
as the OMAP3430, with some features disabled via eFuse bits.  Identify
these devices internally as part of the OMAP3430 family.

Remove the old OMAP35XX_CLASS, which actually covered two very different
chip families.  The OMAP3503/3515/3525/3530 chips will now be covered by
OMAP343X_CLASS, since the silicon appears to be identical.  For the
OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS.

Thanks to Tony Lindgren <tony@atomide.com> for some help with the second
revision of this patch.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Tested-by: NIgor Grinberg <grinberg@compulab.co.il>
Tested-by: NAbhilash Koyamangalath <abhilash.kv@ti.com>

Macros for identifying the max frequency supported by various
OMAP4 variants - Expanding along the lines of OMAP3's feature
handling.

[nm@ti.com: minor fixes for checks that should only for 443x|446x]
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NAneesh V <aneesh@ti.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add support for detecting the latest in the OMAP4 family: OMAP4460
Among other changes, the new chip also can support 1.5GHz A9s,
1080p stereoscopic 3D and 12 MP stereo (dual camera). In addition,
we have changes to OPPs supported, clock tree etc, hence having a
chip detection is required.

For more details on OMAP4460, see Highlights:
http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?contentId=53243&navigationId=12843&templateId=6123

Public TRM is available here as usual:
http://focus.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?templateId=6123&navigationId=12667

[nm@ti.com: cleanups and introduction of ramp system]
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NAneesh V <aneesh@ti.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NPaul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated to not use CHIP_IS_OMAP44XX]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This adapts the register offsets used to read the CPU DIE ID registers
when run on 44XX so they match what is in the OMAP4430 Reference Manual
page 269
Signed-off-by: NAndy Green <andy.green@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Allow OMAP4 ES2.1 and ES2.2 revisions to be recognized in the
omap4_check_revision() function.

Mainly, ES2.1 has fixes that allow LPDDR to be used at 100% OPP (400MHz).
ES2.2 additionally has a couple of power management fixes (to reduce
leakage), an I2C1 SDA line state fix, and a floating point write
corruption fix (cortex erratum).

Even though the current mainline support doesn't need to distinguish
between ES2.X versions, it's still useful to know the correct silicon
rev when issues are reported. Moreover, these id checks can be used by
power management code that selects suitable OPPs considering the
memory speed limitation on ES2.0.

For details about the silicon errata on OMAP4430, refer
http://focus.ti.com/pdfs/wtbu/SWPZ009A_OMAP4430_Errata_Public_vA.pdfSigned-off-by: NNishant Kamat <nskamat@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch updates the common machine specific source files with support for
TI816X.
Signed-off-by: NHemant Pedanekar <hemantp@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Only OMAP2+ platforms have the System Control Module (SCM) IP block.
In the past, we've kept the SCM header file in plat-omap.  This has
led to abuse - device drivers including it; includes being added that
create implicit dependencies on OMAP2+ builds; etc.

In response, move the SCM headers into mach-omap2/.

As part of this, remove the direct SCM access from the OMAP UDC
driver.  It was clearly broken.  The UDC code needs an indepth review for
use on OMAP2+ chips.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>

The existing definitions for cpu revision used
upper nibble in the bits[15:08]. With OMAP3630,
definitions use lower nibble.

This patch unifies the definitions to start
at lower nibble.
Signed-off-by: NSanjeev Premi <premi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch has multiple fixes together. To ensure that git bisect work across
commits, all changes are clubbed together

1. Move the common control base address to control core
2. Remove the manually coeded defines and use the ones from headers.
3. Fix the the status register define in id.c for OMAP4
4. Fix all the register define in hsmmc.c
5. Use the control pad accessor API for omap4 hsmmc register accesses
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch updates the id.c and cpu.h files to support
omap4 ES2.0 silicon detection. Few initial omap4 es2 samples
IDCODE is same as es1. So the patch uses ARM cpuid register to
detect the ES version for such samples
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

Wrong placement of break causes all revisions of 3630 to be
detected as 3630 es1.2, we need to break main loop if we have
an identified chip, default falls through as in the rest of the
switches in this function.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Manjunath K <manjugk@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>
Cc: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add revision detection for ES1.1 and ES1.2. Set default
revision as ES1.2.

Add CHIP_GE_OMAP3630ES1_1 to detect revisions 1.1 and later.
This is needed for at least one feature that is broken in
3630ES1.0 but exists on older (3430 ES3.1) and newer revisions.

Additionally, update some of the CHIP_GE_* macros to use other
macros for ease of maintenance.
Signed-off-by: NAnand Gadiyar <gadiyar@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Manjunatha GK <manjugk@ti.com>
[tony@atomide.com: update to remove fallthrough handling]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Signed-off-by: NKan-Ru Chen <kanru@0xlab.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Allow DIE id to be get and used by others.
Signed-off-by: NKan-Ru Chen <kanru@0xlab.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM3505/3517 doesn't have IO wakeup capability, so we do not need to set
the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register
PM_WKEN_WKUP when the system enters suspend state.

Tested on AM3517EVM and OMAP3530EVM.
Signed-off-by: NStanley.Miao <stanley.miao@windriver.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

omap24xx_check_revision, omap3_check_features,
omap3_check_revision, omap4_check_revision, omap3_cpuinfo
are not used elsewhere, it should be static

Also fixes the following sparse warnings:
arch/arm/mach-omap2/id.c:105:13: warning: symbol 'omap24xx_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:167:13: warning: symbol 'omap3_check_features'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:189:13: warning: symbol 'omap3_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:270:13: warning: symbol 'omap4_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:300:13: warning: symbol 'omap3_cpuinfo'
was not declared. Should it be static?
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

In 3630, DPLL4M2 output can be 96MHz or 192MHz (for SGX to run at
192). This patch has changes to support this feature. 96MHz clock is
generated by dividing 192Mhz clock by 2 using CM_CLKSEL_CORE register.
SGX can select Core Clock, 192MHz clock or CM_96M_FCLK as it's
functional clock. In summary changes done are:
1. Added a feature called omap3_has_192mhz_clk and enabled for 3630
2. Added a new clock node called omap_192m_alwon_ck
3. Made omap_96m_alwon_fck to derive its clock from omap_192m_alwon_ck
Signed-off-by: NVishwanath BS <Vishwanath.bs@ti.com>
[paul@pwsan.com: fixed whitespace]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch fixes the omap_type function to detect whether the device
is GP or HS
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com>
Reviewed-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Some of the OMAP4 specific chip level initialisations are taken care of.
Signed-off-by: NAbhijit Pagare <abhijitpagare@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: updated to use '4430ES1' rather than simply '4430'; updated
 to apply after the intervening cpu.h/id.c patch; thanks also to Tony
 for catching a bug in my rewrite]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

We need to set the omap_chip.oc carefully for the clocks to work.

To fix this, set the omap_chip.oc in omap3_check_features() based
on the CONTROL_IDCODE and silicon revision registers.

Also add handling for 34xx es3.1.2 as es3.1 for now.

Fixes booting on at least overo board.

Based on an earlier patch by Paul Walmsley <paul@pwsan.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The runtime detection of OMAP3515 and OMAP3525
was reversed.
Signed-off-by: NSergey Lapin <slapin@ossfans.org>
Signed-off-by: NSanjeev Premi <premi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch fixes the OMAP4430 cpu detection. The IC rev detection is
done with hawkeye and rev. Note that rev does not map directly to
defined processor revision numbers as ES1.0 uses value 0.It also fixes
the SCM base address to read the correct ID_CODE register.

Also the cpu_is_omap44xx() and cpu_is_omap443x() correctly populated
instead of always being true
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Cleanup the coding style in id.c while avoiding unneeded switch()
statements.
Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

When listing the various SoC features, print them on the same line.
So, instead of this

OMAP3430/3530 ES3.1
 - l2cache : Y
 - iva : Y
 - sgx : Y
 - neon : Y
 - isp : Y

you get this:

OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp )
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

omap3_check_revision() does not depend on omap3_check_features()
move this above so that we can add logic based on revision
detected in check_features.
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NMika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM35xx is functionally similar to OMAP3430 ES3.1 from a
powerdomain/clockdomain perspective. This patch initializes the
omap_chip bits on AM35xx for use by powerdomain and clockdomain code.
Signed-off-by: NRanjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>