- 15 6月, 2018 3 次提交
-
-
由 Mauro Carvalho Chehab 提交于
Changeset 9919cba7 ("watchdog: Update documentation") updated the documentation, removing the old nmi_watchdog.txt and adding a file with a new content. Update Kconfig files accordingly. Fixes: 9919cba7 ("watchdog: Update documentation") Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org> Acked-by: NJonathan Corbet <corbet@lwn.net>
-
由 Dmitry Vyukov 提交于
KCOV is code coverage collection facility used, in particular, by syzkaller system call fuzzer. There is some interest in using syzkaller on arm devices. So port KCOV to arm. On implementation level this merely declares that KCOV is supported and disables instrumentation of 3 special cases. Reasons for disabling are commented in code. Tested with qemu-system-arm/vexpress-a15. Link: http://lkml.kernel.org/r/20180511143248.112484-1-dvyukov@google.comSigned-off-by: NDmitry Vyukov <dvyukov@google.com> Acked-by: NMark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Abbott Liu <liuwenliang@huawei.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Koguchi Takuo <takuo.koguchi.sw@hitachi.com> Cc: <syzkaller@googlegroups.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Masahiro Yamada 提交于
HAVE_CC_STACKPROTECTOR should be selected by architectures with stack canary implementation. It is not about the compiler support. For the consistency with commit 050e9baa ("Kbuild: rename CC_STACKPROTECTOR[_STRONG] config variables"), remove 'CC_' from the config symbol. I moved the 'select' lines to keep the alphabetical sorting. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NKees Cook <keescook@chromium.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 08 6月, 2018 1 次提交
-
-
由 Laurent Dufour 提交于
Currently the PTE special supports is turned on in per architecture header files. Most of the time, it is defined in arch/*/include/asm/pgtable.h depending or not on some other per architecture static definition. This patch introduce a new configuration variable to manage this directly in the Kconfig files. It would later replace __HAVE_ARCH_PTE_SPECIAL. Here notes for some architecture where the definition of __HAVE_ARCH_PTE_SPECIAL is not obvious: arm __HAVE_ARCH_PTE_SPECIAL which is currently defined in arch/arm/include/asm/pgtable-3level.h which is included by arch/arm/include/asm/pgtable.h when CONFIG_ARM_LPAE is set. So select ARCH_HAS_PTE_SPECIAL if ARM_LPAE. powerpc __HAVE_ARCH_PTE_SPECIAL is defined in 2 files: - arch/powerpc/include/asm/book3s/64/pgtable.h - arch/powerpc/include/asm/pte-common.h The first one is included if (PPC_BOOK3S & PPC64) while the second is included in all the other cases. So select ARCH_HAS_PTE_SPECIAL all the time. sparc: __HAVE_ARCH_PTE_SPECIAL is defined if defined(__sparc__) && defined(__arch64__) which are defined through the compiler in sparc/Makefile if !SPARC32 which I assume to be if SPARC64. So select ARCH_HAS_PTE_SPECIAL if SPARC64 There is no functional change introduced by this patch. Link: http://lkml.kernel.org/r/1523433816-14460-2-git-send-email-ldufour@linux.vnet.ibm.comSigned-off-by: NLaurent Dufour <ldufour@linux.vnet.ibm.com> Suggested-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Acked-by: NDavid Rientjes <rientjes@google.com> Cc: Michal Hocko <mhocko@kernel.org> Cc: "Aneesh Kumar K . V" <aneesh.kumar@linux.vnet.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Cc: David S. Miller <davem@davemloft.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Albert Ou <albert@sifive.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: David Rientjes <rientjes@google.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Christophe LEROY <christophe.leroy@c-s.fr> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 06 6月, 2018 1 次提交
-
-
由 Mathieu Desnoyers 提交于
Call the rseq_handle_notify_resume() function on return to userspace if TIF_NOTIFY_RESUME thread flag is set. Perform fixup on the pre-signal frame when a signal is delivered on top of a restartable sequence critical section. Signed-off-by: NMathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Joel Fernandes <joelaf@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Dave Watson <davejwatson@fb.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: "H . Peter Anvin" <hpa@zytor.com> Cc: Chris Lameter <cl@linux.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Andrew Hunter <ahh@google.com> Cc: Michael Kerrisk <mtk.manpages@gmail.com> Cc: "Paul E . McKenney" <paulmck@linux.vnet.ibm.com> Cc: Paul Turner <pjt@google.com> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Josh Triplett <josh@joshtriplett.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Ben Maurer <bmaurer@fb.com> Cc: linux-api@vger.kernel.org Cc: Andy Lutomirski <luto@amacapital.net> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lkml.kernel.org/r/20180602124408.8430-4-mathieu.desnoyers@efficios.com
-
- 19 5月, 2018 1 次提交
-
-
由 Anders Roxell 提交于
While testing multi_v7_defconfig with config fragments that makes the kernel size to grow. The kernel fails to load simple modules, as reported by kselftest: [ 34.107620] test_printf: section 4 reloc 2 sym 'memset': relocation 28 out of range (0xbf046044 -> 0xc109f720) selftests: printf.sh [FAIL] The problem that is seen when enabling too much in the kernel without enabling ARM_MODULE_PLTS, is that the top of the kernel gets out of reach from the bottom of the module area. Suggested-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NAnders Roxell <anders.roxell@linaro.org> Acked-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 09 5月, 2018 5 次提交
-
-
由 Christoph Hellwig 提交于
This way we have one central definition of it, and user can select it as needed. The new option is not user visible, which is the behavior it had in most architectures, with a few notable exceptions: - On x86_64 and mips/loongson3 it used to be user selectable, but defaulted to y. It now is unconditional, which seems like the right thing for 64-bit architectures without guaranteed availablity of IOMMUs. - on powerpc the symbol is user selectable and defaults to n, but many boards select it. This change assumes no working setup required a manual selection, but if that turned out to be wrong we'll have to add another select statement or two for the respective boards. Signed-off-by: NChristoph Hellwig <hch@lst.de>
-
由 Christoph Hellwig 提交于
swiotlb is only used as a library of helper for xen-swiotlb if Xen support is enabled on arm, so don't build it by default. Signed-off-by: NChristoph Hellwig <hch@lst.de>
-
由 Christoph Hellwig 提交于
This way we have one central definition of it, and user can select it as needed. Note that we now also always select it when CONFIG_DMA_API_DEBUG is select, which fixes some incorrect checks in a few network drivers. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NAnshuman Khandual <khandual@linux.vnet.ibm.com>
-
由 Christoph Hellwig 提交于
This way we have one central definition of it, and user can select it as needed. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NAnshuman Khandual <khandual@linux.vnet.ibm.com>
-
由 Christoph Hellwig 提交于
This avoids selecting IOMMU_HELPER just for this function. And we only use it once or twice in normal builds so this often even is a size reduction. Signed-off-by: NChristoph Hellwig <hch@lst.de>
-
- 08 5月, 2018 1 次提交
-
-
由 Christoph Hellwig 提交于
There is no arch specific code required for dma-debug, so there is no need to opt into the support either. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NRobin Murphy <robin.murphy@arm.com>
-
- 23 4月, 2018 1 次提交
-
-
由 Geert Uytterhoeven 提交于
Since commit 9b5ba0df ("ARM: shmobile: Introduce ARCH_RENESAS") ARCH_RENESAS is a more appropriate platform dependency than the legacy ARCH_SHMOBILE, hence use the former. This will allow to drop ARCH_SHMOBILE on ARM in the near future. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
-
- 29 3月, 2018 1 次提交
-
-
由 Jinbum Park 提交于
CONFIG_FORTIFY_SOURCE detects various overflows at compile-time. (6974f0c4 ("include/linux/string.h: add the option of fortified string.h functions) ARCH_HAS_FORTIFY_SOURCE means that the architecture can be built and run with CONFIG_FORTIFY_SOURCE. Since ARM can be built and run with that flag like other architectures, select ARCH_HAS_FORTIFY_SOURCE as default. Acked-by: NKees Cook <keescook@chromium.org> Signed-off-by: NJinbum Park <jinb.park7@gmail.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 07 3月, 2018 2 次提交
-
-
由 Alexandre Belloni 提交于
Reorder the mach-* inclusions so the comment about them being ordered alphabetically ends up being true. Signed-off-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Brendan Higgins 提交于
Adds basic support for the Nuvoton NPCM750 BMC. Signed-off-by: NBrendan Higgins <brendanhiggins@google.com> Reviewed-by: NTomer Maimon <tmaimon77@gmail.com> Reviewed-by: NAvi Fishman <avifishman70@gmail.com> Tested-by: NTomer Maimon <tmaimon77@gmail.com> Tested-by: NAvi Fishman <avifishman70@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
- 21 1月, 2018 3 次提交
-
-
由 Arnd Bergmann 提交于
Discarding the memblock arrays usually works, but causes problems with kexec, as pointed out by this kbuild warning: WARNING: vmlinux.o(.text+0x7c60): Section mismatch in reference from the function machine_kexec_prepare() to the function .meminit.text:memblock_is_region_memory() This lets us keep the memblock structures around whenever kexec is enabled, but otherwise still drops them. Fixes: cf1b0990 ("ARM: 8693/1: discard memblock arrays when possible") Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
由 Jinbum Park 提交于
refcount_t overflow detection is implemented as two way. 1. REFCOUNT_FULL - It means the full refcount_t implementation which has validation but is slightly slower. - (fd25d19f ("locking/refcount: Create unchecked atomic_t implementation")) 2. ARCH_HAS_REFCOUNT - refcount_t overflow detection can be optimized via an arch-dependent way. - It is based on atomic_t infrastructure with some instruction added for detection. - It is faster than REFCOUNT_FULL, as fast as unprotected atomic_t infrastructure. - (7a46ec0e ("locking/refcounts, x86/asm: Implement fast refcount overflow protection")) ARCH_HAS_REFCOUNT has implemented for x86, not implemented for others. In the case of arm64, Will Deacon said he didn't want the specialized "fast but technically incomplete" refcounting as seen with x86's. But rather to set REFCOUNT_FULL by default because no one could point to real-world performance impacts with REFCOUNT_FULL vs unprotected atomic_t infrastructure. This is the reason arm64 ended up enabling REFCOUNT_FULL. (4adcec11 ("arm64: Always use REFCOUNT_FULL")) As with the decision of arm64, arm can set REFCOUNT_FULL by default. Acked-by: NKees Cook <keescook@chromium.org> Signed-off-by: NJinbum Park <jinb.park7@gmail.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
由 Vladimir Murzin 提交于
While running MPS2 platform (NOMMU) with DTB placed below PHYS_OFFSET following warning poped up: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 0 at arch/arm/mm/physaddr.c:42 __virt_to_phys+0x2f/0x40 virt_to_phys used for non-linear address: 00004000 (0x4000) CPU: 0 PID: 0 Comm: swapper Not tainted 4.15.0-rc1-5a31bf2-clean+ #2767 Hardware name: MPS2 (Device Tree Support) [<2100bf39>] (unwind_backtrace) from [<2100b3ff>] (show_stack+0xb/0xc) [<2100b3ff>] (show_stack) from [<2100e697>] (__warn+0x87/0xac) [<2100e697>] (__warn) from [<2100e6db>] (warn_slowpath_fmt+0x1f/0x28) [<2100e6db>] (warn_slowpath_fmt) from [<2100c603>] (__virt_to_phys+0x2f/0x40) [<2100c603>] (__virt_to_phys) from [<2116a499>] (early_init_fdt_reserve_self+0xd/0x24) [<2116a499>] (early_init_fdt_reserve_self) from [<2116222d>] (arm_memblock_init+0xb5/0xf8) [<2116222d>] (arm_memblock_init) from [<21161cad>] (setup_arch+0x38b/0x50e) [<21161cad>] (setup_arch) from [<21160455>] (start_kernel+0x31/0x280) [<21160455>] (start_kernel) from [<00000000>] ( (null)) random: get_random_bytes called from init_oops_id+0x17/0x2c with crng_init=0 ---[ end trace 0000000000000000 ]--- Platforms without MMU support run with 1:1 (i.e. linear) memory mapping, so disable CONFIG_DEBUG_VIRTUAL. Fixes: e377cd82 ("ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL") Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 16 1月, 2018 1 次提交
-
-
由 Kees Cook 提交于
While ARM32 carries FPU state in the thread structure that is saved and restored during signal handling, it doesn't need to declare a usercopy whitelist, since existing accessors are all either using a bounce buffer (for which whitelisting isn't checking the slab), are statically sized (which will bypass the hardened usercopy check), or both. Cc: Russell King <linux@armlinux.org.uk> Cc: Ingo Molnar <mingo@kernel.org> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NKees Cook <keescook@chromium.org>
-
- 15 1月, 2018 1 次提交
-
-
由 Christoph Hellwig 提交于
The trivial direct mapping implementation already does a virtual to physical translation which isn't strictly a noop, and will soon learn to do non-direct but linear physical to dma translations through the device offset and a few small tricks. Rename it to a better fitting name. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NVladimir Murzin <vladimir.murzin@arm.com>
-
- 10 1月, 2018 1 次提交
-
-
由 Christoph Hellwig 提交于
phys_to_dma, dma_to_phys and dma_capable are helpers published by architecture code for use of swiotlb and xen-swiotlb only. Drivers are not supposed to use these directly, but use the DMA API instead. Move these to a new asm/dma-direct.h helper, included by a linux/dma-direct.h wrapper that provides the default linear mapping unless the architecture wants to override it. In the MIPS case the existing dma-coherent.h is reused for now as untangling it will take a bit of work. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NRobin Murphy <robin.murphy@arm.com>
-
- 21 12月, 2017 1 次提交
-
-
由 Masahiro Yamada 提交于
ARCH_S3C24XX is a very exceptional platform that some DT files in arch/arm/boot/dts/, but does not select USE_OF. All the other platforms with DT files correctly select USE_OF directly or indirectly (Most of them are either ARCH_MULTIPLATFORM or ARM_SINGLE_ARMV7M). With ARCH_S3C24XX fixed, "ifeq ($(CONFIG_OF),y)" in DT Makefile can be deleted. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
- 18 12月, 2017 1 次提交
-
-
由 Nicolas Pitre 提交于
The GNU assembler has implemented the "unified syntax" parsing since 2005. This "unified" syntax is required when the kernel is built in Thumb2 mode. However the "unified" syntax is a mixed bag of features, including not requiring a `#' prefix with immediate operands. This leads to situations where some code builds just fine in Thumb2 mode and fails to build in ARM mode if that prefix is missing. This behavior discrepancy makes build tests less valuable, forcing both ARM and Thumb2 builds for proper coverage. Let's "fix" this issue by always using the "unified" syntax for both ARM and Thumb2 mode. Given that the documented minimum binutils version that properly builds the kernel is version 2.20 released in 2010, we can assume that any toolchain capable of building the latest kernel is also "unified syntax" capable. Whith this, a bunch of macros used to mask some differences between both syntaxes can be removed, with the side effect of making LTO easier. Suggested-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 02 11月, 2017 1 次提交
-
-
由 Greg Kroah-Hartman 提交于
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
-
- 23 10月, 2017 1 次提交
-
-
由 Vladimir Murzin 提交于
The last user of CONFIG_VECTORS_BASE has gone, so kill it. Tested-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Reported-by: NAfzal Mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 28 9月, 2017 1 次提交
-
-
由 Nicolas Pitre 提交于
On ARM the generic pfn_valid() version is used with some configurations such as SA1100 based devices. In that case the memblock arrays are no longer used after boot and can be discarded. Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 21 9月, 2017 1 次提交
-
-
由 H Hartley Sweeten 提交于
The EP93xx has four chip selects that can be used for the SDRAM memory. These chip selects are decoded to specify an address domain: SDCS3 0x00000000-0x0fffffff with Boot Option ASDO=1 SDCS0 0xc0000000-0xcfffffff SDCS1 0xd0000000-0xdfffffff SDCS2 0xe0000000-x0efffffff SDCS3 0xf0000000-0xffffffff with Boot Option ASDO=0 Because of the row/column/bank architecture of SDRAM, the mapping of these memories into the processor's memory space is discontiguous. Most ep93xx systems only use one of the chip selects. For these systems, ARCH_HAS_HOLES_MEMORYMODEL has worked fine to handle the discontiguous memory. But, some of the TS-72xx boards use multiple chip selects. The TS-7300 in particular uses SDCS3 (with ASDO=1) and SDCS2. On that system with ARCH_HAS_HOLES_MEMORYMODEL the SDCS2 memory does not get handled correctly and results in the system not booting. Change the EP93xx to ARCH_SPARSEMEM_ENABLE. This handles the discontiguous memory for all configurations. This has been tested on the following ep93xx platforms: EDB9307A with 64 MiB on SDCS0 Vision EP9307 with 64 MiB on SDCS0 TS-7300 with 64 MiB on SDCS3 (with ASDO=1) and 64 MiB on SDCS2 sim.one with 64 MiB on SDCS0 Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Cc: Russell King <linux@armlinux.org.uk> Tested-by: NFlorian Fainelli <f.fainelli@gmail.com> Tested-by: NAlexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 11 9月, 2017 1 次提交
-
-
由 Nicolas Pitre 提交于
The .data segment stored in ROM is only copied to RAM once at boot time and never referenced afterwards. This is arguably a suboptimal usage of ROM resources. This patch allows for compressing the .data segment before storing it into ROM and decompressing it to RAM rather than simply copying it, saving on precious ROM space. Because global data is not available yet (obviously) we must allocate decompressor workspace memory on the stack. The .bss area is used as a stack area for that purpose before it is cleared. The required stack frame is 9568 bytes for __inflate_kernel_data() alone, so make sure the .bss is large enough to cope with that plus extra room for called functions or fail the build. Those numbers were picked arbitrarily based on the above 9568 byte stack frame: 10240 (2.5 * PAGE_SIZE): used to override -Wframe-larger-than whose default value is 1024. 12288 (3 * PAGE_SIZE): minimum .bss size to contain the stack. Signed-off-by: NNicolas Pitre <nico@linaro.org> Reviewed-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: NChris Brandt <Chris.Brandt@renesas.com>
-
- 23 8月, 2017 1 次提交
-
-
由 Shubham Bansal 提交于
The JIT compiler emits ARM 32 bit instructions. Currently, It supports eBPF only. Classic BPF is supported because of the conversion by BPF core. This patch is essentially changing the current implementation of JIT compiler of Berkeley Packet Filter from classic to internal with almost all instructions from eBPF ISA supported except the following BPF_ALU64 | BPF_DIV | BPF_K BPF_ALU64 | BPF_DIV | BPF_X BPF_ALU64 | BPF_MOD | BPF_K BPF_ALU64 | BPF_MOD | BPF_X BPF_STX | BPF_XADD | BPF_W BPF_STX | BPF_XADD | BPF_DW Implementation is using scratch space to emulate 64 bit eBPF ISA on 32 bit ARM because of deficiency of general purpose registers on ARM. Currently, only LITTLE ENDIAN machines are supported in this eBPF JIT Compiler. Tested on ARMv7 with QEMU by me (Shubham Bansal). Testing results on ARMv7: 1) test_bpf: Summary: 341 PASSED, 0 FAILED, [312/333 JIT'ed] 2) test_tag: OK (40945 tests) 3) test_progs: Summary: 30 PASSED, 0 FAILED 4) test_lpm: OK 5) test_lru_map: OK Above tests are all done with following flags enabled discreatly. 1) bpf_jit_enable=1 a) CONFIG_FRAME_POINTER enabled b) CONFIG_FRAME_POINTER disabled 2) bpf_jit_enable=1 and bpf_jit_harden=2 a) CONFIG_FRAME_POINTER enabled b) CONFIG_FRAME_POINTER disabled See Documentation/networking/filter.txt for more information. Signed-off-by: NShubham Bansal <illusionist.neo@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
-
- 02 8月, 2017 1 次提交
-
-
由 Russell King 提交于
Always enable AEABI for ARMv6+, as these use the double-word exclusives which must be passed an even register to avoid errors such as: /tmp/ccG2rCwe.s:905: Error: even register required -- `ldrexd r5,r6,[r7]' /tmp/ccG2rCwe.s:909: Error: even register required -- `strexd sl,r3,r4,[r7]' Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 28 7月, 2017 1 次提交
-
-
由 Arnd Bergmann 提交于
Just like ARCH_MULTIPLATFORM, we want to use ARM_PATCH_PHYS_VIRT when possible, but that fails for NOMMU or XIP_KERNEL configurations. Using 'imply' instead of 'select' gets this right and only uses the symbol when we don't have to hardcode the address anyway. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NAlexander Sverdlin <alexander.sverdlin@gmail.com>
-
- 01 7月, 2017 1 次提交
-
-
由 Vladimir Murzin 提交于
R/M classes of cpus can have memory covered by MPU which in turn might configure RAM as Normal i.e. bufferable and cacheable. It breaks dma_alloc_coherent() and friends, since data can stuck in caches now or be buffered. This patch factors out DMA support for NOMMU configuration into separate entity which provides dedicated dma_ops. We have to handle there several cases: - configurations with MMU/MPU setup - configurations without MMU/MPU setup - special case for M-class, since caches and MPU there are optional In general we rely on default DMA area for coherent allocations or/and per-device memory reserves suitable for coherent DMA, so if such regions are set coherent allocations go from there. In case MMU/MPU was not setup we fallback to normal page allocator for DMA memory allocation. In case we run M-class cpus, for configuration without cache support (like Cortex-M3/M4) dma operations are forced to be coherent and wired with dma-noop (such decision is made based on cacheid global variable); however, if caches are detected there and no DMA coherent region is given (either default or per-device), dma is disallowed even MPU is not set - it is because M-class implement system memory map which defines part of address space as Normal memory. Reported-by: NAlexandre Torgue <alexandre.torgue@st.com> Reported-by: NAndras Szemzo <sza@esh.hu> Tested-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Tested-by: NAndras Szemzo <sza@esh.hu> Tested-by: NAlexandre TORGUE <alexandre.torgue@st.com> Reviewed-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NVladimir Murzin <vladimir.murzin@arm.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NRussell King <rmk+kernel@armlinux.org.uk> [hch: removed the dma_supported() implementation that isn't required anymore] Signed-off-by: NChristoph Hellwig <hch@lst.de>
-
- 22 6月, 2017 1 次提交
-
-
由 Andreas Färber 提交于
Add ARCH_ACTIONS and mach-actions/owl.c for "actions,s500". Signed-off-by: NAndreas Färber <afaerber@suse.de>
-
- 21 6月, 2017 1 次提交
-
-
由 Marek Vasut 提交于
Increase the maximum number of GPIOs on SoCFPGA as this platform can have many GPIO controllers in the FPGA part. Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
-
- 19 6月, 2017 1 次提交
-
-
由 Abel Vesa 提交于
The DYNAMIC_FTRACE_WITH_REGS configuration makes it possible for a ftrace operation to specify if registers need to saved/restored by the ftrace handler. This is needed by kgraft and possibly other ftrace-based tools, and the ARM architecture is currently lacking this feature. It would also be the first step to support the "Kprobes-on-ftrace" optimization on ARM. This patch introduces a new ftrace handler that stores the registers on the stack before calling the next stage. The registers are restored from the stack before going back to the instrumented function. A side-effect of this patch is to activate the support for ftrace_modify_call() as it defines ARCH_SUPPORTS_FTRACE_OPS for the ARM architecture. Signed-off-by: NAbel Vesa <abelvesa@linux.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 14 6月, 2017 1 次提交
-
-
由 Daniel Lezcano 提交于
The config option name is now renamed to 'TIMER_OF' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 13 6月, 2017 1 次提交
-
-
由 Kirill A. Shutemov 提交于
This patch provides all required callbacks required by the generic get_user_pages_fast() code and switches x86 over - and removes the platform specific implementation. Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20170606113133.22974-2-kirill.shutemov@linux.intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
-
- 12 6月, 2017 1 次提交
-
-
由 Yisheng Xie 提交于
When both enable CONFIG_ARM_LPAE=y and CONFIG_VMSPLIT_3G_OPT=y, which means use PAGE_OFFSET=0xB0000000 with ARM_LPAE, the kernel will boot fail and stop after uncompressed: Starting kernel ... Uart base = 0x20001000 watchdog reg = 0x20013000 dtb addr = 0x80840308 Uncompressing Linux... done, booting the kernel. For ARM_LPAE only support 3:1, 2:2, 1:3 split of TTBR1, which mention in: http://elinux.org/images/6/6a/Elce11_marinas.pdf - p16 So we should make VMSPLIT_3G_OPT depends on !ARM_LPAE to avoid trigger this bug. Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NYisheng Xie <xieyisheng1@huawei.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
-
- 05 6月, 2017 1 次提交
-
-
由 Ard Biesheuvel 提交于
Wire up the existing arm64 support for SMBIOS tables (aka DMI) for ARM as well, by moving the arm64 init code to drivers/firmware/efi/arm-runtime.c (which is shared between ARM and arm64), and adding a asm/dmi.h header to ARM that defines the mapping routines for the firmware tables. This allows userspace to access these tables to discover system information exposed by the firmware. It also sets the hardware name used in crash dumps, e.g.: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = ed3c0000 [00000000] *pgd=bf1f3835 Internal error: Oops: 817 [#1] SMP THUMB2 Modules linked in: CPU: 0 PID: 759 Comm: bash Not tainted 4.10.0-09601-g0e8f38792120-dirty #112 Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015 ^^^ NOTE: This does *NOT* enable or encourage the use of DMI quirks, i.e., the the practice of identifying the platform via DMI to decide whether certain workarounds for buggy hardware and/or firmware need to be enabled. This would require the DMI subsystem to be enabled much earlier than we do on ARM, which is non-trivial. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: NRussell King <rmk+kernel@armlinux.org.uk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Matt Fleming <matt@codeblueprint.co.uk> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-efi@vger.kernel.org Link: http://lkml.kernel.org/r/20170602135207.21708-14-ard.biesheuvel@linaro.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
-