1. 30 6月, 2020 2 次提交
  2. 02 6月, 2020 7 次提交
  3. 17 5月, 2020 1 次提交
  4. 16 5月, 2020 1 次提交
  5. 08 5月, 2020 1 次提交
  6. 26 4月, 2020 1 次提交
  7. 23 4月, 2020 3 次提交
  8. 01 11月, 2019 1 次提交
    • I
      dpaa2-eth: add MAC/PHY support through phylink · 71947923
      Ioana Ciornei 提交于
      The dpaa2-eth driver now has support for connecting to its associated
      PHY device found through standard OF bindings.
      
      This happens when the DPNI object (that the driver probes on) gets
      connected to a DPMAC. When that happens, the device tree is looked up by
      the DPMAC ID, and the associated PHY bindings are found.
      
      The old logic of handling the net device's link state by hand still
      needs to be kept, as the DPNI can be connected to other devices on the
      bus than a DPMAC: other DPNI, DPSW ports, etc. This logic is only
      engaged when there is no DPMAC (and therefore no phylink instance)
      attached.
      
      The MC firmware support multiple type of DPMAC links: TYPE_FIXED,
      TYPE_PHY. The TYPE_FIXED mode does not require any DPMAC management from
      Linux side, and as such, the driver will not handle such a DPMAC.
      
      Although PHYLINK typically handles SFP cages and in-band AN modes, for
      the moment the driver only supports the RGMII interfaces found on the
      LX2160A. Support for other modes will come later.
      Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      71947923
  9. 07 10月, 2019 1 次提交
  10. 30 8月, 2019 1 次提交
    • I
      dpaa2-eth: Add pause frame support · 8eb3cef8
      Ioana Radulescu 提交于
      Starting with firmware version MC10.18.0, we have support for
      L2 flow control. Asymmetrical configuration (Rx or Tx only) is
      supported, but not pause frame autonegotioation.
      
      Pause frame configuration is done via ethtool. By default, we start
      with flow control enabled on both Rx and Tx. Changes are propagated
      to hardware through firmware commands, using two flags (PAUSE,
      ASYM_PAUSE) to specify Rx and Tx pause configuration, as follows:
      
      PAUSE | ASYM_PAUSE | Rx pause | Tx pause
      ----------------------------------------
        0   |     0      | disabled | disabled
        0   |     1      | disabled | enabled
        1   |     0      | enabled  | enabled
        1   |     1      | enabled  | disabled
      
      The hardware can automatically send pause frames when the number
      of buffers in the pool goes below a predefined threshold. Due to
      this, flow control is incompatible with Rx frame queue taildrop
      (both mechanisms target the case when processing of ingress
      frames can't keep up with the Rx rate; for large frames, the number
      of buffers in the pool may never get low enough to trigger pause
      frames as long as taildrop is enabled). So we set pause frame
      generation and Rx FQ taildrop as mutually exclusive.
      Signed-off-by: NIoana Radulescu <ruxandra.radulescu@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8eb3cef8
  11. 13 6月, 2019 2 次提交
  12. 27 5月, 2019 1 次提交
  13. 17 4月, 2019 3 次提交
  14. 27 3月, 2019 1 次提交
  15. 04 3月, 2019 2 次提交
  16. 07 2月, 2019 3 次提交
  17. 20 1月, 2019 2 次提交
  18. 29 11月, 2018 5 次提交
  19. 17 11月, 2018 2 次提交