1. 25 8月, 2017 1 次提交
    • M
      IB/mlx5: Fix Raw Packet QP event handler assignment · 1d31e9c0
      Majd Dibbiny 提交于
      In case we have SQ and RQ for Raw Packet QP, the SQ's event handler
      wasn't assigned.
      
      Fixing this by assigning event handler for each WQ after creation.
      
      [ 1877.145243] Call Trace:
      [ 1877.148644] <IRQ>
      [ 1877.150580] [<ffffffffa07987c5>] ? mlx5_rsc_event+0x105/0x210 [mlx5_core]
      [ 1877.159581] [<ffffffffa0795bd7>] ? mlx5_cq_event+0x57/0xd0 [mlx5_core]
      [ 1877.167137] [<ffffffffa079208e>] mlx5_eq_int+0x53e/0x6c0 [mlx5_core]
      [ 1877.174526] [<ffffffff8101a679>] ? sched_clock+0x9/0x10
      [ 1877.180753] [<ffffffff810f717e>] handle_irq_event_percpu+0x3e/0x1e0
      [ 1877.188014] [<ffffffff810f735d>] handle_irq_event+0x3d/0x60
      [ 1877.194567] [<ffffffff810f9fe7>] handle_edge_irq+0x77/0x130
      [ 1877.201129] [<ffffffff81014c3f>] handle_irq+0xbf/0x150
      [ 1877.207244] [<ffffffff815ed78a>] ? atomic_notifier_call_chain+0x1a/0x20
      [ 1877.214829] [<ffffffff815f434f>] do_IRQ+0x4f/0xf0
      [ 1877.220498] [<ffffffff815e94ad>] common_interrupt+0x6d/0x6d
      [ 1877.227025] <EOI>
      [ 1877.228967] [<ffffffff814834e2>] ? cpuidle_enter_state+0x52/0xc0
      [ 1877.236990] [<ffffffff81483615>] cpuidle_idle_call+0xc5/0x200
      [ 1877.243676] [<ffffffff8101bc7e>] arch_cpu_idle+0xe/0x30
      [ 1877.249831] [<ffffffff810b4725>] cpu_startup_entry+0xf5/0x290
      [ 1877.256513] [<ffffffff815cfee1>] start_secondary+0x265/0x27b
      [ 1877.263111] Code: Bad RIP value.
      [ 1877.267296] RIP [< (null)>] (null)
      [ 1877.273264] RSP <ffff88046fd63df8>
      [ 1877.277531] CR2: 0000000000000000
      
      Fixes: 19098df2 ("IB/mlx5: Refactor mlx5_ib_qp to accommodate other QP types")
      Signed-off-by: NMajd Dibbiny <majd@mellanox.com>
      Reviewed-by: NYishai Hadas <yishaih@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      1d31e9c0
  2. 23 8月, 2017 1 次提交
  3. 24 7月, 2017 3 次提交
  4. 02 6月, 2017 1 次提交
  5. 14 5月, 2017 1 次提交
  6. 02 5月, 2017 4 次提交
  7. 22 4月, 2017 1 次提交
    • P
      IB/mlx5: Support congestion related counters · e1f24a79
      Parav Pandit 提交于
      This patch adds support to query the congestion related hardware counters
      through new command and links them with other hw counters being available
      in hw_counters sysfs location.
      
      In order to reuse existing infrastructure it renames related q_counter
      data structures to more generic counters to reflect q_counters and
      congestion counters and maybe some other counters in the future.
      
      New hardware counters:
       * rp_cnp_handled - CNP packets handled by the reaction point
       * rp_cnp_ignored - CNP packets ignored by the reaction point
       * np_cnp_sent    - CNP packets sent by notification point to respond to
                           CE marked RoCE packets
       * np_ecn_marked_roce_packets - CE marked RoCE packets received by
                                      notification point
      
      It also avoids returning ENOSYS which is specific for invalid
      system call and produces the following checkpatch.pl warning.
      
      WARNING: ENOSYS means 'invalid syscall nr' and nothing else
      +		return -ENOSYS;
      Signed-off-by: NParav Pandit <parav@mellanox.com>
      Reviewed-by: NEli Cohen <eli@mellanox.com>
      Reviewed-by: NDaniel Jurgens <danielj@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      e1f24a79
  8. 17 4月, 2017 1 次提交
  9. 15 2月, 2017 6 次提交
  10. 14 2月, 2017 3 次提交
  11. 07 2月, 2017 1 次提交
    • S
      net/mlx5: TX WQE update · 2b31f7ae
      Saeed Mahameed 提交于
      Add new TX WQE fields for Connect-X5 vlan insertion support,
      type and vlan_tci, when type = MLX5_ETH_WQE_INSERT_VLAN the
      HW will insert the vlan and prio fields (vlan_tci) to the packet.
      
      Those bits and the inline header fields are mutually exclusive, and
      valid only when:
      MLX5_CAP_ETH(mdev, wqe_inline_mode) == MLX5_CAP_INLINE_MODE_NOT_REQUIRED
      and MLX5_CAP_ETH(mdev, wqe_vlan_insert),
      who will be set in ConnectX-5 and later HW generations.
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      Reviewed-by: NTariq Toukan <tariqt@mellanox.com>
      2b31f7ae
  12. 10 1月, 2017 2 次提交
    • E
      IB/mlx5: Allow future extension of libmlx5 input data · b037c29a
      Eli Cohen 提交于
      Current check requests that new fields in struct
      mlx5_ib_alloc_ucontext_req_v2 that are not known to the driver be zero.
      This was introduced so new libraries passing additional information to
      the kernel through struct mlx5_ib_alloc_ucontext_req_v2 will be notified
      by old kernels that do not support their request by failing the
      operation. This schecme is problematic since it requires libmlx5 to issue
      the requests with descending input size for struct
      mlx5_ib_alloc_ucontext_req_v2.
      
      To avoid this, we require that new features that will obey the following
      rules:
      If the feature requires one or more fields in the response and the at
      least one of the fields can be encoded such that a zero value means the
      kernel ignored the request then this field will provide the indication
      to the library. If no response is required or if zero is a valid
      response, a new field should be added that indicates to the library
      whether its request was processed.
      
      Fixes: b368d7cb ('IB/mlx5: Add hca_core_clock_offset to udata in init_ucontext')
      Signed-off-by: NEli Cohen <eli@mellanox.com>
      Reviewed-by: NMatan Barak <matanb@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      b037c29a
    • E
      IB/mlx5: Use blue flame register allocator in mlx5_ib · 5fe9dec0
      Eli Cohen 提交于
      Make use of the blue flame registers allocator at mlx5_ib. Since blue
      flame was not really supported we remove all the code that is related to
      blue flame and we let all consumers to use the same blue flame register.
      Once blue flame is supported we will add the code. As part of this patch
      we also move the definition of struct mlx5_bf to mlx5_ib.h as it is only
      used by mlx5_ib.
      Signed-off-by: NEli Cohen <eli@mellanox.com>
      Reviewed-by: NMatan Barak <matanb@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      5fe9dec0
  13. 08 1月, 2017 3 次提交
  14. 03 1月, 2017 2 次提交
  15. 15 12月, 2016 2 次提交
  16. 14 12月, 2016 1 次提交
  17. 17 11月, 2016 6 次提交
  18. 30 10月, 2016 1 次提交