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  1. 24 2月, 2016 3 次提交
  3. 16 12月, 2015 1 次提交
  5. 07 12月, 2015 1 次提交
  7. 05 12月, 2015 1 次提交
  9. 10 11月, 2015 1 次提交
  11. 03 11月, 2015 1 次提交
  13. 22 10月, 2015 1 次提交
  15. 21 10月, 2015 1 次提交
  17. 19 10月, 2015 1 次提交
  19. 18 10月, 2015 1 次提交
  21. 13 10月, 2015 1 次提交
    • C
      f2fs: export ra_nid_pages to sysfs · ea1a29a0
      由 Chao Yu 提交于 
      After finishing building free nid cache, we will try to readahead
asynchronously 4 more pages for the next reloading, the count of
readahead nid pages is fixed.

In some case, like SMR drive, read less sectors with fixed count
each time we trigger RA may be low efficient, since we will face
high seeking overhead, so we'd better let user to configure this
parameter from sysfs in specific workload.
Signed-off-by: NChao Yu <chao2.yu@samsung.com>
Signed-off-by: NJaegeuk Kim <jaegeuk@kernel.org>
      ea1a29a0
  23. 11 10月, 2015 3 次提交
  25. 10 10月, 2015 1 次提交
  27. 08 10月, 2015 2 次提交
  29. 05 10月, 2015 5 次提交
    • A
      intel_th: Add PTI output driver · 14cdbf04
      由 Alexander Shishkin 提交于 
      Parallel Trace Interface (PTI) unit is a trace output device that sends
data over a PTI port.

The driver provides interfaces to configure bus width, bus clock divider
and mode. Tracing is enabled via output device's "active" attribute.
Signed-off-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      14cdbf04
    • A
      intel_th: Add Memory Storage Unit driver · ba82664c
      由 Alexander Shishkin 提交于 
      Memory Storage Unit (MSU) is a trace output device that collects trace
data to system memory. It consists of 2 independent Memory Storage
Controllers (MSCs).

This driver provides userspace interfaces to configure in-memory tracing
parameters, such as contiguous (high-order allocation) buffer or multiblock
(scatter list) buffer mode, wrapping (data overwrite) and number and sizes
of windows in multiblock mode. Userspace can read the buffers via mmap()ing
or read()ing of the corresponding device node.
Signed-off-by: NLaurent Fert <laurent.fert@intel.com>
Signed-off-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      ba82664c
    • A
      intel_th: Add Global Trace Hub driver · b27a6a3f
      由 Alexander Shishkin 提交于 
      Global Trace Hub (GTH) is the central component of Intel TH architecture;
it carries out switching between the trace sources and trace outputs, can
enable/disable tracing, perform STP encoding, internal buffering, control
backpressure from outputs to sources and so on.

This property is also reflected in the software model; GTH (switch) driver
is required for the other subdevices to probe, because it matches trace
output devices against its output ports and configures them accordingly.

It also implements an interface for output ports to request trace enabling
or disabling and a few other useful things.

For userspace, it provides an attribute group "masters", which allows
configuration of per-master trace output destinations for up to master 255
and "256+" meaning "masters 256 and above". It also provides an attribute
group to discover and configure some of the parameters of its output ports,
called "outputs". Via these the user can set up data retention policy for
an individual output port or check if it is in reset state.
Signed-off-by: NLaurent Fert <laurent.fert@intel.com>
Signed-off-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b27a6a3f
    • A
      intel_th: Add driver infrastructure for Intel(R) Trace Hub devices · 39f40346
      由 Alexander Shishkin 提交于 
      Intel(R) Trace Hub (TH) is a set of hardware blocks (subdevices) that
produce, switch and output trace data from multiple hardware and
software sources over several types of trace output ports encoded
in System Trace Protocol (MIPI STPv2) and is intended to perform
full system debugging.

For these subdevices, we create a bus, where they can be discovered
and configured by userspace software.

This patch creates this bus infrastructure, three types of devices
(source, output, switch), resource allocation, some callback mechanisms
to facilitate communication between the subdevices' drivers and some
common sysfs attributes.
Signed-off-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      39f40346
    • A
      stm class: Introduce an abstraction for System Trace Module devices · 7bd1d409
      由 Alexander Shishkin 提交于 
      A System Trace Module (STM) is a device exporting data in System Trace
Protocol (STP) format as defined by MIPI STP standards. Examples of such
devices are Intel(R) Trace Hub and Coresight STM.

This abstraction provides a unified interface for software trace sources
to send their data over an STM device to a debug host. In order to do
that, such a trace source needs to be assigned a pair of master/channel
identifiers that all the data from this source will be tagged with. The
STP decoder on the debug host side will use these master/channel tags to
distinguish different trace streams from one another inside one STP
stream.

This abstraction provides a configfs-based policy management mechanism
for dynamic allocation of these master/channel pairs based on trace
source-supplied string identifier. It has the flexibility of being
defined at runtime and at the same time (provided that the policy
definition is aligned with the decoding end) consistency.

For userspace trace sources, this abstraction provides write()-based and
mmap()-based (if the underlying stm device allows this) output mechanism.

For kernel-side trace sources, we provide "stm_source" device class that
can be connected to an stm device at run time.

Cc: linux-api@vger.kernel.org
Reviewed-by: NMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      7bd1d409
  31. 04 10月, 2015 1 次提交
  33. 01 10月, 2015 3 次提交
  35. 24 9月, 2015 5 次提交
  37. 23 9月, 2015 1 次提交
  39. 21 9月, 2015 1 次提交
  41. 16 9月, 2015 1 次提交
  43. 29 8月, 2015 1 次提交
  45. 20 8月, 2015 1 次提交
  47. 19 8月, 2015 1 次提交
  49. 16 8月, 2015 1 次提交