Skip to content

K
Kernel

openeuler / Kernel
12 个月 前同步成功

通知 5
Star 0
Fork 0
K
Kernel

体验新版 GitCode，发现更多精彩内容 >>

切换分支/标签
  1. 12 10月, 2007 3 次提交
  3. 27 8月, 2007 1 次提交
  5. 01 8月, 2007 6 次提交
  7. 18 7月, 2007 1 次提交
  9. 11 7月, 2007 4 次提交
  11. 08 5月, 2007 1 次提交
    • M
      serial driver PMC MSP71xx · beab697a
      由 Marc St-Jean 提交于 
      Serial driver patch for the PMC-Sierra MSP71xx devices.

There are three different fixes:

1 Fix for DesignWare APB THRE errata: In brief, this is a non-standard
  16550 in that the THRE interrupt will not re-assert itself simply by
  disabling and re-enabling the THRI bit in the IER, it is only re-enabled
  if a character is actually sent out.

  It appears that the "8250-uart-backup-timer.patch" in the "mm" tree
  also fixes it so we have dropped our initial workaround.  This patch now
  needs to be applied on top of that "mm" patch.

2 Fix for Busy Detect on LCR write: The DesignWare APB UART has a feature
  which causes a new Busy Detect interrupt to be generated if it's busy
  when the LCR is written.  This fix saves the value of the LCR and
  rewrites it after clearing the interrupt.

3 Workaround for interrupt/data concurrency issue: The SoC needs to
  ensure that writes that can cause interrupts to be cleared reach the UART
  before returning from the ISR.  This fix reads a non-destructive register
  on the UART so the read transaction completion ensures the previously
  queued write transaction has also completed.
Signed-off-by: NMarc St-Jean <Marc_St-Jean@pmc-sierra.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      beab697a
  13. 05 3月, 2007 1 次提交
  15. 07 2月, 2007 4 次提交
  17. 30 11月, 2006 1 次提交
  19. 01 11月, 2006 2 次提交
  21. 09 10月, 2006 1 次提交
  23. 08 10月, 2006 1 次提交
  25. 14 7月, 2006 1 次提交
  27. 01 7月, 2006 1 次提交
  29. 28 6月, 2006 1 次提交
  31. 20 6月, 2006 1 次提交
    • R
      [MIPS] Cleanup memory managment initialization. · 2925aba4
      由 Ralf Baechle 提交于 
      Historically plat_mem_setup did the entire platform initialization.  This
was rather impractical because it meant plat_mem_setup had to get away
without any kind of memory allocator.  To keep old code from breaking
plat_setup was just renamed to plat_setup and a second platform
initialization hook for anything else was introduced.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      2925aba4
  33. 19 4月, 2006 1 次提交
    • R
      [MIPS] Rewrite all the assembler interrupt handlers to C. · e4ac58af
      由 Ralf Baechle 提交于 
      Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had.  And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.

The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e4ac58af
  35. 28 3月, 2006 1 次提交
  37. 28 2月, 2006 1 次提交
    • R
      [MIPS] SMP: Fix initialization order bug. · 9b6695a8
      由 Ralf Baechle 提交于 
          
A recent change requires cpu_possible_map to be initialized before
smp_sched_init() but most MIPS platforms were initializing their
processors in the prom_prepare_cpus callback of smp_prepare_cpus.  The
simple fix of calling prom_prepare_cpus from one of the earlier SMP
initialization hooks doesn't work well either since IPIs may require
init_IRQ() to have completed, so bit the bullet and split
prom_prepare_cpus into two initialization functions, plat_smp_setup
which is called early from setup_arch and plat_prepare_cpus called where
prom_prepare_cpus used to be called.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      9b6695a8
  39. 22 2月, 2006 1 次提交
  41. 07 2月, 2006 1 次提交
  43. 05 2月, 2006 1 次提交
  45. 13 1月, 2006 1 次提交
  47. 08 11月, 2005 1 次提交
  49. 30 10月, 2005 2 次提交