- 14 5月, 2010 2 次提交
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由 Kyungmin Park 提交于
This patch extends OneNAND core code with support for OneNAND verify write check. This is done by allocating the buffer for verify read directly from the core code. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kyungmin Park 提交于
This patch adds support for OneNAND chips that have 4KiB page size. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 16 12月, 2009 1 次提交
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由 Roel Kluin 提交于
mtd->writesize and len are unsigned so the test does not work. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 30 11月, 2009 4 次提交
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由 Mika Korhonen 提交于
Signed-off-by: NMika Korhonen <ext-mika.2.korhonen@nokia.com> Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Mika Korhonen 提交于
Add support for multiblock erase command. OneNANDs (excluding Flex-OneNAND) are capable of simultaneous erase of up to 64 eraseblocks which is much faster. This changes the erase requests for regions covering multiple eraseblocks to be performed using multiblock erase. Signed-off-by: NMika Korhonen <ext-mika.2.korhonen@nokia.com> Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Mika Korhonen 提交于
Separate the actual execution of erase to a new function: onenand_block_by_block_erase(). This is done in preparation for the multiblock erase support. Signed-off-by: NMika Korhonen <ext-mika.2.korhonen@nokia.com> Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Amul Kumar Saha 提交于
What is OTP in OneNAND? The device includes, 1. one block-sized OTP (One Time Programmable) area and 2. user-controlled 1st block OTP(Block 0) that can be used to increase system security or to provide identification capabilities. What is done? In OneNAND, one block of the NAND Array is set aside as an OTP memory area, and 1st Block (Block 0) can be used as OTP area. This area, available to the user, can be configured and locked with secured user information. The OTP block can be read, programmed and locked using the same operations as any other NAND Flash Array memory block. After issuing an OTP-Lock, OTP block cannot be erased. OTP block is fully-guaranteed to be a good block. Why it is done? Locking the 1st Block OTP has the effect of a 'Write-protect' to guard against accidental re-programming of data stored in the 1st block and OTP Block. Which problem it solves? OTP support is provided in the existing implementation of OneNAND/Flex-OneNAND driver, but it is not working with OneNAND devices. Have observed the following in current OTP OneNAND Implmentation, 1. DataSheet specific sequence to lock the OTP Area is not followed. 2. Certain functions are quiet generic to cope with OTP specific activity. This patch re-implements OTP support for OneNAND device. How it is done? For all blocks, 8th word is available to the user. However, in case of OTP Block, 8th word of sector 0, page 0 is reserved as OTP Locking Bit area. Therefore, in case of OTP Block, user usage on this area is prohibited. Condition specific values are entered in the 8th word, sector0, page 0 of the OTP block during the process of issuing an OTP-Lock. The possible conditions are: 1. Only 1st Block Lock 2. Only OTP Block Lock 3. Lock both the 1st Block and the OTP Block What Other feature additions have been done in this patch? This patch adds feature for: 1. Only 1st Block Lock 2. Lock both the 1st Block and the OTP Blocks Re-implemented OTP support for OneNAND Added following features to OneNAND 1. Lock only 1st Block in OneNAND 2. Lock BOTH 1st Block and OTP Block in OneNAND [comments were slightly tweaked by Artem] Signed-off-by: NAmul Kumar Saha <amul.saha@samsung.com> Reviewed-by: NAdrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 05 10月, 2009 2 次提交
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由 David Woodhouse 提交于
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Amul Kumar Saha 提交于
This patch resolves all the prints present in onenand_base.c Primarily, it replaces the hard-coded function names in the prints, and makes use of __func__. Signed-off-by: NAmul Kumar Saha <amul.saha@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 04 9月, 2009 1 次提交
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由 Mika Korhonen 提交于
Signed-off-by: NMika Korhonen <mika.j.korhonen@gmail.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 16 6月, 2009 1 次提交
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由 Amul Saha 提交于
This patch unifies the flex_bdry setting for module vs. built-in configuration of OneNAND. Signed-off-by: NAmul Kumar Saha <amul.saha@samsung.com> Signed-off-by: NVishak G <vishak.g@samsung.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 06 6月, 2009 3 次提交
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由 Kyungmin Park 提交于
Add bbt_wait & unlock_all as replaceable for some platform such as s3c64xx s3c64xx has its own OneNAND controller and another interface Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Rohit Hagargundgi 提交于
Add support for Samsung Flex-OneNAND devices. Flex-OneNAND combines SLC and MLC technologies into a single device. SLC area provides increased reliability and speed, suitable for storing code such as bootloader, kernel and root file system. MLC area provides high density and is suitable for storing user data. SLC and MLC regions can be configured through kernel parameter. [akpm@linux-foundation.org: export flexoand_region and onenand_addr] Signed-off-by: NRohit Hagargundgi <h.rohit@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: Vishak G <vishak.g@samsung.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Adrian Hunter 提交于
In addition to adding the Numonyx manufacturer code, this patch also ensures 'sync. write' is disabled when reading identification data - something that the Numonyx chip objects to, but the Samsung chip seems to ignore. Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 23 3月, 2009 1 次提交
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由 Kyungmin Park 提交于
OneNAND write-while-program method of writing improves performance, compared with ordinary writes, by transferring data to OneNAND's RAM buffers atthe same time as programming the NAND core. When writing several NAND pages at a time, an improvement of 12% to 25% is seen. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 10 12月, 2008 1 次提交
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由 Adrian Hunter 提交于
MTD internal API presently uses 32-bit values to represent device size. This patch updates them to 64-bits but leaves the external API unchanged. Extending the external API is a separate issue for several reasons. First, no one needs it at the moment. Secondly, whether the implementation is done with IOCTLs, sysfs or both is still debated. Thirdly external API changes require the internal API to be accepted first. Note that although the MTD API will be able to support 64-bit device sizes, existing drivers do not and are not required to do so, although NAND base has been updated. In general, changing from 32-bit to 64-bit values cause little or no changes to the majority of the code with the following exceptions: - printk message formats - division and modulus of 64-bit values - NAND base support - 32-bit local variables used by mtdpart and mtdconcat - naughtily assuming one structure maps to another in MEMERASE ioctl Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 12 8月, 2008 1 次提交
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由 Adrian Hunter 提交于
Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 05 6月, 2008 1 次提交
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由 Kyungmin Park 提交于
To get the correct information in case of power off recovery, it should read ECC status first Also remove previous workaround method. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 23 4月, 2008 2 次提交
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由 Adrian Hunter 提交于
A power loss while writing can result in a page becoming unreadable. When the device is mounted again, reading that page gives controller errors. Upper level software like JFFS2 treat -EIO as fatal, refusing to mount at all. That means it is necessary to treat the error as an ECC error to allow recovery. Note that typically in this case, the eraseblock can still be erased and rewritten i.e. it has not become a bad block. Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Roel Kluin 提交于
Acked-By: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 16 2月, 2008 1 次提交
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由 Kyungmin Park 提交于
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 07 2月, 2008 1 次提交
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由 Richard Purdie 提交于
Implement the panic_write function for the onenand driver. This waits for any active command to complete/timeout, performs the write, waits for it to complete and then returns. Signed-off-by: NRichard Purdie <rpurdie@rpsys.net> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 29 1月, 2008 7 次提交
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由 Kyungmin Park 提交于
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Sheng Yongjie (Sam 提交于
In function onenand_verify_oob, local variable oobbuf shall be unsigned char. In the case of a value is >= 0x80, it's unequal in comparing the value in an unsigned char and signed char. Signed-off-by: NSheng Yongjie (Sam) <samsheng@trident.com.cn> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Kyungmin Park 提交于
Some chips don't set the ONENAND_CTRL_LOAD bit. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Kyungmin Park 提交于
Use the higher bits for other purpose. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Kyungmin Park 提交于
Consolidate OneNAND operation order as OneNAND Spec. It also doesn't break previous operation order. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Adrian Hunter 提交于
Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Adrian Hunter 提交于
Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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- 26 11月, 2007 1 次提交
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由 Adrian Hunter 提交于
When an ECC error occurs, the read should be completed anyway before returning -EBADMSG. Returning -EBADMSG straight away is incorrect. Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 24 10月, 2007 1 次提交
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由 Jeff Garzik 提交于
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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- 14 10月, 2007 3 次提交
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由 Adrian Hunter 提交于
When the erase callback performs some other action on the flash, it's highly likely to deadlock unless we actually release the chip lock before calling it. This patch mirrors that same change already done for NAND. Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Adrian Hunter 提交于
The OneNAND driver was confusing JFFS2 by returning positive error codes. Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Adrian Hunter 提交于
Ensure OneNAND's block locking operations are synchronized like all other operations. Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 13 10月, 2007 1 次提交
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由 Kyungmin Park 提交于
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 24 9月, 2007 1 次提交
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由 Artem Bityutskiy 提交于
This patch make the OneNAND driver much less racy. It fixes our "onenand_wait: read timeout!" heisenbugs. The reason of these bugs was that the driver did not lock the chip when accessing OTP, and it screwed up OneNAND state when the OTP was read while JFFS2 was doing FS checking. This patch also fixes other races I spotted: 1. BBT was not protected 2. Access to ecc_stats was not protected Now the chip is locked when BBT is accessed. To fix all of these I basically split all interface functions on 'function()' and 'function_nolock()' parts. I tested this patch on N800 hardware - it fixes our problems. But I tested a little different version because our OneNAND codebase is slightly out-of-date. But it should be OK. This patch also includes the prin fixes I posted before. Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 06 9月, 2007 1 次提交
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由 Kyungmin Park 提交于
Now we can use yaffs2 on OneNAND Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 30 8月, 2007 1 次提交
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由 Kyungmin Park 提交于
To enable the main read/write at oob ops Next time we will commit the main read/write support for yaffs2 Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 30 6月, 2007 1 次提交
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由 Kyungmin Park 提交于
The 2X Program is an extension of Program Operation. Since the device is equipped with two DataRAMs, and two-plane NAND Flash memory array, these two component enables simultaneous program of 4KiB. Plane1 has only even blocks such as block0, block2, block4 while Plane2 has only odd blocks such as block1, block3, block5. So MTD regards it as 4KiB page size and 256KiB block size Now the following chips support it. (KFXXX16Q2M) Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M, Mux: KFM2G16Q2M, KFN4G16Q2M, And more recent chips Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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