1. 18 2月, 2023 1 次提交
  2. 03 2月, 2023 1 次提交
  3. 03 11月, 2022 1 次提交
  4. 21 10月, 2022 1 次提交
  5. 29 9月, 2022 1 次提交
  6. 16 8月, 2022 1 次提交
  7. 23 7月, 2022 1 次提交
  8. 14 7月, 2022 1 次提交
  9. 09 7月, 2022 1 次提交
  10. 08 7月, 2022 1 次提交
  11. 06 7月, 2022 1 次提交
  12. 09 6月, 2022 1 次提交
  13. 15 2月, 2022 7 次提交
  14. 12 2月, 2022 1 次提交
  15. 11 2月, 2022 1 次提交
    • J
      i2c: designware: Add AMD PSP I2C bus support · 78d5e9e2
      Jan Dabros 提交于
      Implement an I2C controller sharing mechanism between the host (kernel)
      and PSP co-processor on some platforms equipped with AMD Cezanne SoC.
      
      On these platforms we need to implement "software" i2c arbitration.
      Default arbitration owner is PSP and kernel asks for acquire as well
      as inform about release of the i2c bus via mailbox mechanism.
      
                  +---------+
       <- ACQUIRE |         |
        +---------|   CPU   |\
        |         |         | \      +----------+  SDA
        |         +---------+  \     |          |-------
      MAILBOX                   +--> |  I2C-DW  |  SCL
        |         +---------+        |          |-------
        |         |         |        +----------+
        +---------|   PSP   |
         <- ACK   |         |
                  +---------+
      
                  +---------+
       <- RELEASE |         |
        +---------|   CPU   |
        |         |         |        +----------+  SDA
        |         +---------+        |          |-------
      MAILBOX                   +--> |  I2C-DW  |  SCL
        |         +---------+  /     |          |-------
        |         |         | /      +----------+
        +---------|   PSP   |/
         <- ACK   |         |
                  +---------+
      
      The solution is similar to i2c-designware-baytrail.c implementation, where
      we are using a generic i2c-designware-* driver with a small "wrapper".
      
      In contrary to baytrail semaphore implementation, beside internal
      acquire_lock() and release_lock() methods we are also applying quirks to
      lock_bus() and unlock_bus() global adapter methods. With this in place
      all i2c clients drivers may lock i2c bus for a desired number of i2c
      transactions (e.g. write-wait-read) without being aware of that such bus
      is shared with another entity.
      
      Modify i2c_dw_probe_lock_support() to select correct semaphore
      implementation at runtime, since now we have more than one available.
      
      Configure new matching ACPI ID "AMDI0019" and register
      ARBITRATION_SEMAPHORE flag in order to distinguish setup with PSP
      arbitration.
      
      Add myself as a reviewer for I2C DesignWare in order to help with reviewing
      and testing possible changes touching new i2c-designware-amdpsp.c module.
      Signed-off-by: NJan Dabros <jsd@semihalf.com>
      Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Acked-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
      Tested-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
      [wsa: removed unneeded blank line and curly braces]
      Signed-off-by: NWolfram Sang <wsa@kernel.org>
      78d5e9e2
  16. 09 12月, 2021 1 次提交
  17. 23 11月, 2021 2 次提交
  18. 22 11月, 2021 1 次提交
  19. 11 10月, 2021 1 次提交
  20. 02 10月, 2021 1 次提交
  21. 20 8月, 2021 1 次提交
  22. 18 8月, 2021 1 次提交
  23. 26 5月, 2021 1 次提交
  24. 11 4月, 2021 1 次提交
  25. 06 4月, 2021 1 次提交
  26. 29 3月, 2021 1 次提交
  27. 24 3月, 2021 1 次提交
  28. 28 1月, 2021 1 次提交
  29. 22 1月, 2021 3 次提交
  30. 20 1月, 2021 1 次提交
    • A
      ARM: remove tango platform · edd4488a
      Arnd Bergmann 提交于
      The smp8758 (tango4) SoC was the last generation of set-top-box chips
      to come out of Sigma Designs, and support was added by Marc Gonzalez
      and Måns Rullgård between 2015 and 2017, before the company went out of
      business and the products were abandoned.
      
      The chip is used in some set-top-boxes such as the Popcorn Hour A-500,
      which could have seen some adoption by hobbyists. This has not happened
      in the past four years, and support for the more widely used MIPS based
      SoCs was never merged at all.
      
      Thanks to Marc and Måns for maintaining for the past years even after the
      death of the platform.
      
      Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
      Cc: Mans Rullgard <mans@mansr.com>
      Link: https://lore.kernel.org/lkml/2d643ebc-09af-a809-eb3f-2aec8ecee501@free.fr/Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      edd4488a
  31. 17 1月, 2021 1 次提交