提交 · 4a13b4cefc2149bb62ebf90e8de89d14a2370907 · openeuler / Kernel

01 7月, 2020 40 次提交

drm/amd/powerplay: clean up the APIs for pptable setup · 4a13b4ce

由 Evan Quan 提交于 5月 28, 2020

Combine and simplify the logics for setup pptable.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

4a13b4ce

drm/amd/powerplay: clean up the APIs for bootup clocks · 12ea3449

由 Evan Quan 提交于 5月 28, 2020

Combine and simplify the logics for retrieving bootup
clocks.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

12ea3449

drm/amd/powerplay: centralize all buffer allocation in sw_init phase · 78eb4a36

由 Evan Quan 提交于 5月 28, 2020

To fit common design. And this can simplify the buffer deallocation.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

78eb4a36

drm/amd/powerplay: implement a common API for dpms disablement · 61555ccb

由 Evan Quan 提交于 6月 03, 2020

So that code can be shared between .hw_fini and .suspend.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

61555ccb

drm/amd/powerplay: drop unused APIs and unnecessary checks · 2f55c264

由 Evan Quan 提交于 6月 03, 2020

Minor code cleanups.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

2f55c264

drm/amd/powerplay: eliminate asic type check · 31157341

由 Evan Quan 提交于 6月 08, 2020

The macros check if the asic has the callback.
So no need to explicitly check.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

31157341

drm/amd/display: fix spelling mistake: "propogation" -> "propagation" · 5402eb5e

由 Colin Ian King 提交于 6月 04, 2020

There is a spelling mistake in a dml_print message. Fix it.
Signed-off-by: NColin Ian King <colin.king@canonical.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

5402eb5e

drm/amdgpu/display: use blanked rather than plane state for sync groups · 3a3a720e

由 Alex Deucher 提交于 6月 02, 2020

We may end up with no planes set yet, depending on the ordering, but we
should have the proper blanking state which is either handled by either
DPG or TG depending on the hardware generation.  Check both to determine
the proper blanked state.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/781
Fixes: 5fc0cbfa ("drm/amd/display: determine if a pipe is synced by plane state")
Cc: nicholas.kazlauskas@amd.com
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

3a3a720e

drm/amd/display: Revalidate bandwidth before commiting DC updates · 4ec6c0a2

由 Nicholas Kazlauskas 提交于 6月 02, 2020

[Why]
Whenever we switch between tiled formats without also switching pixel
formats or doing anything else that recreates the DC plane state we
can run into underflow or hangs since we're not updating the
DML parameters before committing to the hardware.

[How]
If the update type is FULL then call validate_bandwidth again to update
the DML parmeters before committing the state.

This is basically just a workaround and protective measure against
update types being added DC where we could run into this issue in
the future.

We can only fully validate the state in advance before applying it to
the hardware if we recreate all the plane and stream states since
we can't modify what's currently in use.

The next step is to update DM to ensure that we're creating the plane
and stream states for whatever could potentially be a full update in
DC to pre-emptively recreate the state for DC global validation.

The workaround can stay until this has been fixed in DM.
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: NHersen Wu <hersenxs.wu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

4ec6c0a2

drm/amdgpu/fence: use the no_scheduler flag · 730c2eb9

由 Alex Deucher 提交于 6月 02, 2020

Rather than checking the ring type manually.  We already set
this for MES and KIQ (and a few other special cases).
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

730c2eb9

Revert "drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper" · eb0b5d6f

由 Alex Deucher 提交于 6月 02, 2020

This reverts commit 4541ea81.

This changes structs used by the hardware and breaks dpm on some cards.
Acked-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

eb0b5d6f

drm/amd/display: Only actually breakpoint if DEBUG_KERNEL_DC is enabled · f86c9b8b

由 Nicholas Kazlauskas 提交于 6月 03, 2020

To match previous behavior and to not hang the kernel if someone
accidentally builds with KGDB enabled.

Fixes: 1aad7078 ("drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print")
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

f86c9b8b

drm/amd/powerplay: use existed smu_dpm_set* interfaces to implement powergate functions · da483dd1

由 Huang Rui 提交于 6月 01, 2020

Abstract powergate_vcn/jpeg functions, using smu_dpm_set* to implement it.
Signed-off-by: NHuang Rui <ray.huang@amd.com>
Reviewed-by: NKevin Wang <kevin1.wang@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

da483dd1

drm/amdgpu: temporarily read bounding box from gpu_info fw for navi12 · cc375d8c

由 Tianci.Yin 提交于 6月 03, 2020

The bounding box is still needed by Navi12, temporarily read it from gpu_info
firmware. Should be droped when DAL no longer needs it.
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: NTianci.Yin <tianci.yin@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

cc375d8c

drm/amd/display: Add DCN3 to Kconfig · 96134346

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

96134346

drm/amd/display: Add DCN3 blocks to Makefile · e77165bf

由 Bhawanpreet Lakha 提交于 5月 25, 2020

Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

e77165bf

drm/amdgpu/display: fix build without CONFIG_DRM_AMD_DC_DCN3_0 · cb8bcc98

由 Alex Deucher 提交于 6月 03, 2020

Need to guard some new DCN3.0 stuff.
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

cb8bcc98

drm/amd/display: fix and simplify pipe split logic for DCN3 · f0bfa78b

由 Dmytro Laktyushkin 提交于 4月 27, 2020

This was done already done for other DCN blocks.
Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

f0bfa78b

drm/amdgpu: Enable DM block for DCN3 · 464ab91a

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

464ab91a

drm/amd/display: Remove Unused Registers · 7f3e2919

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

7f3e2919

drm/amd/display: Handle RGBE_ALPHA Pixel Format · fb625e1b

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

fb625e1b

drm/amd/display: Init function tables for DCN3 · c5c76abd

由 Bhawanpreet Lakha 提交于 5月 25, 2020

Initilize function tables for hw programing
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

c5c76abd

drm/amd/display: Add DCN3 VPG · 3c10f4fb

由 Bhawanpreet Lakha 提交于 5月 25, 2020

Video Package generator.

used to prepare avi info, DP info etc
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

3c10f4fb

drm/amd/display: Add DCN3 AFMT · 73de3de5

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Audio formating

Audio related code for setup/control
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

73de3de5

drm/amd/display: Add DCN3 Command Table Helpers · 330fa233

由 Bhawanpreet Lakha 提交于 5月 21, 2020

-Handle DCN3 cases for bios parser and command tables
-Add command function tables for DCN3
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

330fa233

drm/amd/display: Add DCN3 Resource · 5dba4991

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support for managing resources for DCN3
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

5dba4991

drm/amd/display: Add DCN3 Support in DM (v2) · 79037324

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Handle DCN3 in amdgpu_dm

v2: fix num_pkrs handling
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

79037324

drm/amd/display: Add DCN3 HWSEQ · d99f1387

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add HW sequence programing for DCN3
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

d99f1387

drm/amd/display: Add DCN3 DMUB · 5baebf61

由 Bhawanpreet Lakha 提交于 5月 29, 2020

DMUB (Display Micro-Controller Unit)

Used to read/write regs
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

5baebf61

drm/amd/display: Add DCN3 GPIO · 666ed8bf

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support to program GPIO HW block
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

666ed8bf

drm/amd/display: Add DCN3 IRQ · 21f4809a

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add IWQ services for DCN3,

This allows us to create/init and manage irqs for DCN3
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

21f4809a

drm/amd/display: Add DCN3 DML · 6725a88f

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support for DML(Display mode library) for bandwidth calculations
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

6725a88f

drm/amd/display: Add DCN3 DWB · 8993dee0

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support to program the DCN3 DWB (Display Writeback)

HW Blocks:

 +--------++------+       +----------+
 | HUBBUB || HUBP |  <--  | MMHUBBUB |
 +--------++------+       +----------+
        |                     ^
        v                     |
    +--------+            +--------+
    |  DPP   |            |  DWB   |
    +--------+            +--------+
        |
        v                      ^
    +--------+                 |
    |  MPC   |                 |
    +--------+                 |
        |                      |
        v                      |
    +-------+                  |
    |  OPP  |                  |
    +-------+                  |
        |                      |
        v                      |
    +--------+                /
    |  OPTC  |  --------------
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

8993dee0

drm/amd/display: Add DCN3 MMHUBHUB · 4898dc48

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support to program the DCN3 MMHUBBUB (Multimedia HUB interface)

HW Blocks:

 +--------++------+       +----------+
 | HUBBUB || HUBP |  <--  | MMHUBBUB |
 +--------++------+       +----------+
        |
        v
    +--------+
    |  DPP   |
    +--------+
        |
        v
    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

4898dc48

drm/amd/display: Add DCN3 HUBP · db7b0216

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support to program the DCN3 HUBP (Display to data fabric interface
pipe)

HW Blocks:

 +--------++------+
 | HUBBUB || HUBP |
 +--------++------+
        |
        v
    +--------+
    |  DPP   |
    +--------+
        |
        v
    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

db7b0216

drm/amd/display: Add DCN3 HUBHUB · 8f712e3e

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support to program the HUBBUB (DCN memory HUB interface)

HW Blocks:

 +--------+
 | HUBBUB |
 +--------+
        |
        v
    +--------+
    |  DPP   |
    +--------+
        |
        v
    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

8f712e3e

drm/amd/display: Add DCN3 DPP · 03f54d7d

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support to program the DCN3 DPP (Multiple pipe and plane combine)

HW Blocks:

    +--------+
    |  DPP   |
    +--------+
        |
        v
    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

03f54d7d

drm/amd/display: Add DCN3 MPC · b708205f

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support to program the DCN3 MPC (Multiple pipe and plane combine)

HW Blocks:

    +--------+
    |  MPC   |
    +--------+
        |
        v
    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

b708205f

drm/amd/display: Add DCN3 OPP header · 8ea13e52

由 Bhawanpreet Lakha 提交于 5月 22, 2020

Add support to program the DCN3 OPP (Output Plane Processing)

HW Blocks:

    +-------+
    |  OPP  |
    +-------+
        |
        v
    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

8ea13e52

drm/amd/display: Add DCN3 OPTC · 64e7f91e

由 Bhawanpreet Lakha 提交于 5月 21, 2020

Add support for programming the DCN3 OPTC (Output Timing Controller)

HW Blocks:

    +--------+
    |  OPTC  |
    +--------+
        |
        v
    +--------+       +--------+
    |  DIO   |       |  DCCG  |
    +--------+       +--------+
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

64e7f91e

openeuler / Kernel 1 年多 前同步成功

openeuler / Kernel
1 年多前同步成功