1. 10 11月, 2005 3 次提交
    • P
      powerpc: Move some extern declarations from C code into headers · 49b09853
      Paul Mackerras 提交于
      This also make klimit have the same type on 32-bit as on 64-bit,
      namely unsigned long, and defines and initializes it in one place.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      49b09853
    • P
      [PATCH] powerpc: merge code values for identifying platforms · 799d6046
      Paul Mackerras 提交于
      This patch merges platform codes.  systemcfg->platform is no longer used,
      systemcfg use in general is deprecated as much as possible (and renamed
      _systemcfg before it gets completely moved elsewhere in a future patch),
      _machine is now used on ppc64 along as ppc32.  Platform codes aren't gone
      yet but we are getting a step closer. A bunch of asm code in head[_64].S
      is also turned into C code.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      799d6046
    • D
      [PATCH] powerpc: Consolidate asm compatibility macros · 3ddfbcf1
      David Gibson 提交于
      This patch consolidates macros used to generate assembly for
      compatibility across different CPUs or configs.  A new header,
      asm-powerpc/asm-compat.h contains the main compatibility macros.  It
      uses some preprocessor magic to make the macros suitable both for use
      in .S files, and in inline asm in .c files.  Headers (bitops.h,
      uaccess.h, atomic.h, bug.h) which had their own such compatibility
      macros are changed to use asm-compat.h.
      
      ppc_asm.h is now for use in .S files *only*, and a #error enforces
      that.  As such, we're a lot more careless about namespace pollution
      here than in asm-compat.h.
      
      While we're at it, this patch adds a call to the PPC405_ERR77 macro in
      futex.h which should have had it already, but didn't.
      
      Built and booted on pSeries, Maple and iSeries (ARCH=powerpc).  Built
      for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      3ddfbcf1
  2. 07 11月, 2005 1 次提交
    • B
      [PATCH] ppc64: support 64k pages · 3c726f8d
      Benjamin Herrenschmidt 提交于
      Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel
      base page size to 64K.  The resulting kernel still boots on any
      hardware.  On current machines with 4K pages support only, the kernel
      will maintain 16 "subpages" for each 64K page transparently.
      
      Note that while real 64K capable HW has been tested, the current patch
      will not enable it yet as such hardware is not released yet, and I'm
      still verifying with the firmware architects the proper to get the
      information from the newer hypervisors.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      3c726f8d
  3. 23 9月, 2005 1 次提交
    • M
      ppc64 iSeries: Update create_pte_mapping to replace iSeries_bolt_kernel() · 4c55130b
      Michael Ellerman 提交于
      early_setup() calls htab_initialize() which is similar, but not identical
      to iSeries_bolt_kernel().
      
      On iSeries the Hypervisor has already inserted some ptes for us, and we
      simply have to detect that and bolt them. iSeries_hpte_bolt_or_insert()
      implements that logic.
      
      For the case of a non-existing pte we just call iSeries_hpte_insert(). This
      appears to work, although it's not entirely equivalent to the old code in
      iSeries_make_pte() which panicked if we got a secondary slot. Not sure if
      that's important.
      
      Finally we call iSeries_hpte_bolt_or_insert() from create_pte_mapping(),
      which is called from htab_initialize() for each lmb region.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      4c55130b
  4. 21 9月, 2005 1 次提交
  5. 19 9月, 2005 1 次提交
  6. 06 9月, 2005 1 次提交
    • D
      [PATCH] Invert sense of SLB class bit · 14b34661
      David Gibson 提交于
      Currently, we set the class bit in kernel SLB entries, and clear it on
      user SLB entries.  On POWER5, ERAT entries created in real mode have
      the class bit clear.  So to avoid flushing kernel ERAT entries on each
      context switch, this patch inverts our usage of the class bit, setting
      it on user SLB entries and clearing it on kernel SLB entries.
      
      Booted on POWER5 and G5.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      14b34661
  7. 29 8月, 2005 3 次提交
    • D
      [PATCH] Dynamic hugepage addresses for ppc64 · c594adad
      David Gibson 提交于
      Paulus, I think this is now a reasonable candidate for the post-2.6.13
      queue.
      
      Relax address restrictions for hugepages on ppc64
      
      Presently, 64-bit applications on ppc64 may only use hugepages in the
      address region from 1-1.5T.  Furthermore, if hugepages are enabled in
      the kernel config, they may only use hugepages and never normal pages
      in this area.  This patch relaxes this restriction, allowing any
      address to be used with hugepages, but with a 1TB granularity.  That
      is if you map a hugepage anywhere in the region 1TB-2TB, that entire
      area will be reserved exclusively for hugepages for the remainder of
      the process's lifetime.  This works analagously to hugepages in 32-bit
      applications, where hugepages can be mapped anywhere, but with 256MB
      (mmu segment) granularity.
      
      This patch applies on top of the four level pagetable patch
      (http://patchwork.ozlabs.org/linuxppc64/patch?id=1936).
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c594adad
    • D
      [PATCH] Change address of ppc64 initial segment table · c59c464a
      David Gibson 提交于
      On ppc64 machines with segment tables, CPU0's segment table is at a
      fixed address, currently 0x9000.  This patch moves it to the free
      space at 0x6000, just below the fwnmi data area.  This saves 8k of
      space in vmlinux and the runtime kernel image.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c59c464a
    • D
      [PATCH] Four level pagetables for ppc64 · e28f7faf
      David Gibson 提交于
      Implement 4-level pagetables for ppc64
      
      This patch implements full four-level page tables for ppc64, thereby
      extending the usable user address range to 44 bits (16T).
      
      The patch uses a full page for the tables at the bottom and top level,
      and a quarter page for the intermediate levels.  It uses full 64-bit
      pointers at every level, thus also increasing the addressable range of
      physical memory.  This patch also tweaks the VSID allocation to allow
      matching range for user addresses (this halves the number of available
      contexts) and adds some #if and BUILD_BUG sanity checks.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e28f7faf
  8. 28 7月, 2005 2 次提交
    • D
      [PATCH] ppc64: remove another fixed address constraint · 488f8499
      David Gibson 提交于
      Presently the LparMap, one of the structures the kernel shares with the
      legacy iSeries hypervisor has a fixed offset address in head.S.  This patch
      changes this so the LparMap is a normally initialized structure, without
      fixed address.  This allows us to use macros to compute some of the values
      in the structure, which wasn't previously possible because the assembler
      always uses signed-% which gets the wrong answers for the computations in
      question.
      
      Unfortunately, a gcc bug means that doing this requires another structure
      (hvReleaseData) to be initialized in asm instead of C, but on the whole the
      result is cleaner than before.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      488f8499
    • D
      [PATCH] ppc64: dynamically allocate segment tables · 533f0817
      David Gibson 提交于
      PPC64 machines before Power4 need a segment table page allocated for each
      CPU.  Currently these are allocated statically in a big array in head.S for
      all CPUs.  The segment tables need to be in the first segment (so
      do_stab_bolted doesn't take a recursive fault on the stab itself), but
      other than that there are no constraints which require the stabs for the
      secondary CPUs to be statically allocated.
      
      This patch allocates segment tables dynamically during boot, using
      lmb_alloc() to ensure they are within the first 256M segment.  This reduces
      the kernel image size by 192k...
      
      Tested on RS64 iSeries, POWER3 pSeries, and POWER5.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      533f0817
  9. 14 7月, 2005 1 次提交
  10. 26 6月, 2005 1 次提交
  11. 23 6月, 2005 1 次提交
  12. 06 5月, 2005 1 次提交
    • D
      [PATCH] ppc64: pgtable.h and other header cleanups · 1f8d419e
      David Gibson 提交于
      This patch started as simply removing a few never-used macros from
      asm-ppc64/pgtable.h, then kind of grew.  It now makes a bunch of
      cleanups to the ppc64 low-level header files (with corresponding
      changes to .c files where necessary) such as:
      	- Abolishing never-used macros
      	- Eliminating multiple #defines with the same purpose
      	- Removing pointless macros (cases where just expanding the
      macro everywhere turns out clearer and more sensible)
      	- Removing some cases where macros which could be defined in
      terms of each other weren't
      	- Moving imalloc() related definitions from pgtable.h to their
      own header file (imalloc.h)
      	- Re-arranging headers to group things more logically
      	- Moving all VSID allocation related things to mmu.h, instead
      of being split between mmu.h and mmu_context.h
      	- Removing some reserved space for flags from the PMD - we're
      not using it.
      	- Fix some bugs which broke compile with STRICT_MM_TYPECHECKS.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      1f8d419e
  13. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4