- 29 3月, 2012 2 次提交
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由 David Howells 提交于
Move all declarations of free_initmem() to linux/mm.h so that there's only one and it's used by everything. Signed-off-by: NDavid Howells <dhowells@redhat.com> cc: linux-c6x-dev@linux-c6x.org cc: microblaze-uclinux@itee.uq.edu.au cc: linux-sh@vger.kernel.org cc: sparclinux@vger.kernel.org cc: x86@kernel.org cc: linux-mm@kvack.org
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由 David Howells 提交于
Disintegrate asm/system.h for C6X. Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NMark Salter <msalter@redhat.com> cc: linux-c6x-dev@linux-c6x.org
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- 08 3月, 2012 1 次提交
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由 Mark Salter 提交于
There was a latent typo in the C6X KSTK_EIP and KSTK_ESP macros which caused a problem with a new patch which used them. The broken definitions were of the form: #define KSTK_FOO(tsk) (task_pt_regs(task)->foo) Note the use of task vs tsk. This actually worked before because the only place in the kernel which used these macros passed in a local pointer named task. Signed-off-by: NMark Salter <msalter@redhat.com>
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- 16 2月, 2012 1 次提交
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由 Mark Salter 提交于
The C6X IRQ support was copied almost verbatim from the PowerPC virtual IRQ code. The PowerPC code was used as the basis for generic irq_domain support, so this patch mostly copies what what done to arch/powerpc by Grant Likely in his irq_domain patch series. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Aurelien Jacquiot <a-jacquiot@ti.com> Cc: Thomas Gleixner <tglx@linutronix.de>
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- 09 1月, 2012 1 次提交
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由 Mark Salter 提交于
Recent memblock related commits require the following C6X changes: * commit 24aa0788 asm/memblock.h no longer required * commit 1440c4e2 memblock_analyze() no longer needed to update total size * commit fe091c20 memblock_init() no longer needed Signed-off-by: NMark Salter <msalter@redhat.com>
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- 07 10月, 2011 16 次提交
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由 Mark Salter 提交于
All SoCs provide an area of device configuration registers called the DSCR. The location of specific registers as well as their use varies considerably from implementation to implementation. Rather than having to rely on additional SoC-specific DSCR code for each new supported SoC, this code generalize things as much as possible using device tree properties. Initialization must take place early on (setup_arch time) in case the event timer device needs to be enable via the DSCR. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Mark Salter 提交于
This patch provides a soc_ops struct which provides hooks for SoC functionality which doesn't fit well into other places. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Mark Salter 提交于
The C6X SoCs contain several PLL controllers each with up to 16 clock outputs feeding into the cores or peripheral clock domains. The hardware is very similar to arm/mach-davinci clocks. This is still a work in progress which needs to be updated once device tree clock binding changes shake out. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> [msalter@redhat.com: add include of linux/module.h to sys_c6x.c] Signed-off-by: NMark Salter <msalter@redhat.com>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> The C6X architecture currently lacks an MMU so memory management is relatively simple. There is no bus snooping between L2 and main memory but coherent DMA memory is supported by making regions of main memory uncached. If such a region is desired, it can be specified on the commandline with a "memdma=" argument. Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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由 Aurelien Jacquiot 提交于
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: NAurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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