1. 22 3月, 2013 2 次提交
    • B
      KVM: PPC: Added one_reg interface for timer registers · 78accda4
      Bharat Bhushan 提交于
      If userspace wants to change some specific bits of TSR
      (timer status register) then it uses GET/SET_SREGS ioctl interface.
      So the steps will be:
            i)   user-space will make get ioctl,
            ii)  change TSR in userspace
            iii) then make set ioctl.
      It can happen that TSR gets changed by kernel after step i) and
      before step iii).
      
      To avoid this we have added below one_reg ioctls for oring and clearing
      specific bits in TSR. This patch adds one registerface for:
           1) setting specific bit in TSR (timer status register)
           2) clearing specific bit in TSR (timer status register)
           3) setting/getting the TCR register. There are cases where we want to only
              change TCR and not TSR. Although we can uses SREGS without
              KVM_SREGS_E_UPDATE_TSR flag but I think one reg is better. I am open
              if someone feels we should use SREGS only here.
           4) getting/setting TSR register
      Signed-off-by: NBharat Bhushan <bharat.bhushan@freescale.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      78accda4
    • B
      KVM: PPC: move tsr update in a separate function · d26f22c9
      Bharat Bhushan 提交于
      This is done so that same function can be called from SREGS and
      ONE_REG interface (follow up patch).
      Signed-off-by: NBharat Bhushan <bharat.bhushan@freescale.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      d26f22c9
  2. 05 3月, 2013 1 次提交
  3. 13 2月, 2013 2 次提交
  4. 10 1月, 2013 3 次提交
    • A
      KVM: PPC: BookE: Add EPR ONE_REG sync · 324b3e63
      Alexander Graf 提交于
      We need to be able to read and write the contents of the EPR register
      from user space.
      
      This patch implements that logic through the ONE_REG API and declares
      its (never implemented) SREGS counterpart as deprecated.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      324b3e63
    • A
      KVM: PPC: BookE: Implement EPR exit · 1c810636
      Alexander Graf 提交于
      The External Proxy Facility in FSL BookE chips allows the interrupt
      controller to automatically acknowledge an interrupt as soon as a
      core gets its pending external interrupt delivered.
      
      Today, user space implements the interrupt controller, so we need to
      check on it during such a cycle.
      
      This patch implements logic for user space to enable EPR exiting,
      disable EPR exiting and EPR exiting itself, so that user space can
      acknowledge an interrupt when an external interrupt has successfully
      been delivered into the guest vcpu.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      1c810636
    • A
      KVM: PPC: BookE: Allow irq deliveries to inject requests · b8c649a9
      Alexander Graf 提交于
      When injecting an interrupt into guest context, we usually don't need
      to check for requests anymore. At least not until today.
      
      With the introduction of EPR, we will have to create a request when the
      guest has successfully accepted an external interrupt though.
      
      So we need to prepare the interrupt delivery to abort guest entry
      gracefully. Otherwise we'd delay the EPR request.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b8c649a9
  5. 06 12月, 2012 4 次提交
  6. 06 10月, 2012 22 次提交
  7. 11 7月, 2012 1 次提交
  8. 30 5月, 2012 1 次提交
  9. 08 4月, 2012 4 次提交