- 04 8月, 2015 7 次提交
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由 Herbert Xu 提交于
This patch converts the authenc implementations in caam to the new AEAD interface. The biggest change is that seqiv no longer generates a random IV. Instead the IPsec sequence number is used as the IV. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Herbert Xu 提交于
This patch converts authenc to the new AEAD interface. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Herbert Xu 提交于
This patch disables the authenc tests while the conversion to the new IV calling convention takes place. It also replaces the authenc test vectors with ones that will work with the new IV convention. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6由 Herbert Xu 提交于
Merge the crypto tree to pull in the qat registration bug fix.
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由 Aaron Sierra 提交于
Compiling the talitos driver with my GCC 4.3.1 e500v2 cross-compiler resulted in a failed build due to the anonymous union/structures introduced in this commit: crypto: talitos - enhanced talitos_desc struct for SEC1 The build error was: drivers/crypto/talitos.h:56: error: unknown field 'len' specified in initializer drivers/crypto/talitos.h:56: warning: missing braces around initializer drivers/crypto/talitos.h:56: warning: (near initialization for 'zero_entry.<anonymous>') drivers/crypto/talitos.h:57: error: unknown field 'j_extent' specified in initializer drivers/crypto/talitos.h:58: error: unknown field 'eptr' specified in initializer drivers/crypto/talitos.h:58: warning: excess elements in struct initializer drivers/crypto/talitos.h:58: warning: (near initialization for 'zero_entry') make[2]: *** [drivers/crypto/talitos.o] Error 1 make[1]: *** [drivers/crypto] Error 2 make: *** [drivers] Error 2 This patch eliminates the errors by relying on the C standard's implicit assignment of zero to static variables. Signed-off-by: NAaron Sierra <asierra@xes-inc.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Stephan Mueller 提交于
The AEAD API changes are now reflected in the crypto API doc book. Signed-off-by: NStephan Mueller <smueller@chronox.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Colin Ian King 提交于
Trival change, fix spelling mistake 'aquire' -> 'acquire' in dev_err message. Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 31 7月, 2015 1 次提交
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由 Horia Geant? 提交于
The encap shared descriptor was changed to use the new IV convention. In the process some commands were shifted, making the output length zero, caam effectively writing garbage in dst. While here, update the decap descriptor to execute the "write" commands before the "read"s (as it previously was). This makes sure the input fifo is drained before becoming full. Fixes: 46218750 ("crypto: caam - Use new IV convention") Signed-off-by: NHoria Geant? <horia.geanta@freescale.com> Signed-off-by: NTudor Ambarus <tudor.ambarus@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 30 7月, 2015 3 次提交
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由 Dan Streetman 提交于
Change my IBM email to my personal IEEE email. I'm leaving IBM, so my email there won't work anymore. This changes the owner to my personal email, so I can still get cc'ed on patches, until someone at IBM sends a patch to take it over. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
One of the debug messages in the NX 842 PowerNV driver is missing the required be32_to_cpu() wrapper when accessing the __be32 field csb->count. Add the wrapper so the message will show the correct count. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
Return success instead of error if compression succeeds but the output is larger than the input. It's unlikely that the caller will use the compressed data since it's larger than the original uncompressed data, but there was no error and returning an error code is incorrect. Further, for testing small input buffers, the output is likely to be larger than the input and success needs to be returned to verify the test. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 28 7月, 2015 7 次提交
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由 Bruce Allan 提交于
There's no need to iterate through the list for instances in the accel_table since the number of devices is already known in this file. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kees Cook 提交于
Since the API for jent_panic() does not include format string parameters, adjust the call to panic() to use a literal string to avoid any future callers from leaking format strings into the panic message. Signed-off-by: NKees Cook <keescook@chromium.org> Acked-by: NStephan Mueller <smueller@chronox.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Ahsan Atta 提交于
Signed-off-by: NAhsan Atta <ahsan.atta@intel.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Bruce Allan 提交于
Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Bruce Allan 提交于
The subject macro mistakenly compares the passed-in ring size in bytes with ADF_RING_SIZE_4K which is 0x6 (an internal representation of 4KB) rather than comparing with the intended value of 4096. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Bruce Allan 提交于
The element pci_dev_id in the struct adf_hw_device_data is redundant since the PCI device id can be retrieved from the struct pci_dev. Signed-off-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Martin Schwidefsky 提交于
The kthread_run() function can return two different error values but the hwrng core only checks for -ENOMEM. If the other error value -EINTR is returned it is assigned to hwrng_fill and later used on a kthread_stop() call which naturally crashes. Cc: stable@vger.kernel.org Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 23 7月, 2015 11 次提交
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由 Dan Streetman 提交于
Remove the common 'platform' registration module, and move the crypto compression driver registration into each of the pSeries and PowerNV platform NX 842 drivers. Change the nx-842.c code into simple common functions that each platform driver uses to perform constraints-based buffer changes, i.e. realigning and/or resizing buffers to match the driver's hardware requirements. The common 'platform' module was my mistake to create - since each platform driver will only load/operate when running on its own platform (i.e. a pSeries platform or a PowerNV platform), they can directly register with the crypto subsystem, using the same alg and driver name. This removes unneeded complexity. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
The last commit merged nx-842.c's code into nx-842-crypto.c. It did not rename nx-842-crypto.c to nx-842.c, in order to let the patch more clearly show what was merged. This just renames nx-842-crypto.c to nx-842.c, with no changes to its code. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
Merge the nx-842.c code into nx-842-crypto.c. This allows later patches to remove the 'platform' driver, and instead allow each platform driver to directly register with the crypto compression api. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
Replace the duplicated finishing code (set destination buffer length and set return code to 0) in the case of decompressing a buffer with no header with a goto to the success case of decompressing a buffer with a header. This is a trivial change that allows both success cases to use common code, and includes the pr_debug() msg in both cases as well. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
Don't register the pSeries driver when parsing the device tree returns ENODEV. The nx842_probe() function in the pSeries driver returns error instead of registering as a crypto compression driver, when it receives an error return value from the nx842_OF_upd() function that probes the device tree nodes, except when ENODEV is returned. However ENODEV should not be a special case and the driver should not register when there is no hw device, or the hw device is disabled. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
Move the kzalloc() calls in nx842_probe() and nx842_OF_upd() to the top of the functions, before taking the devdata spinlock. Since kzalloc() without GFP_ATOMIC can sleep, it can't be called while holding a spinlock. Move the calls to before taking the lock. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
Remove the 'status' field from the pSeries NX driver data. The 'status' field isn't used by the driver at all; it simply checks the devicetree status node at initialization, and returns success if 'okay' and failure otherwise. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Dan Streetman 提交于
Remove the __init and __exit modifiers from the VIO driver probe and remove functions. The driver functions should not be marked __init/__exit because they can/will be called during runtime, not only at module init and exit. Signed-off-by: NDan Streetman <ddstreet@ieee.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tadeusz Struk 提交于
When multiple devices are present in the system the driver attempts to register the same algorithm many times. Changes in v2: - use proper synchronization mechanizm between register and unregister Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Herbert Xu 提交于
This patch removes a bogus BUG_ON in the ablkcipher path that triggers when the destination buffer is different from the source buffer and is scattered. Cc: stable@vger.kernel.org Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tadeusz Struk 提交于
The synchronization method used atomic was bogus. Use a proper synchronization with mutex. Cc: stable@vger.kernel.org Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 7月, 2015 2 次提交
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由 Tadeusz Struk 提交于
The condition checking allowed key length was invalid. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tadeusz Struk 提交于
The condition checking allowed key length was invalid. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 20 7月, 2015 9 次提交
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由 LABBE Corentin 提交于
Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
Add support for the Security System included in Allwinner SoC A20. The Security System is a hardware cryptographic accelerator that support: - MD5 and SHA1 hash algorithms - AES block cipher in CBC/ECB mode with 128/196/256bits keys. - DES and 3DES block cipher in CBC/ECB mode Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
This patch adds documentation for Device-Tree bindings for the Security System cryptographic accelerator driver. Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG algorithms. It could be found on many Allwinner SoC. This patch enable the Security System on the Allwinner A20 SoC Device-tree. Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 LABBE Corentin 提交于
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG algorithms. It could be found on many Allwinner SoC. This patch enable the Security System on the Allwinner A10 SoC Device-tree. Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Tudor Ambarus 提交于
An implicit truncation is done when using a variable of 64 bits in MATH command: warning: large integer implicitly truncated to unsigned type [-Woverflow] Silence the compiler by feeding it with an explicit truncated value. Signed-off-by: NTudor Ambarus <tudor.ambarus@freescale.com> Signed-off-by: NHoria Geant? <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Horia Geant? 提交于
When successful, the descriptor that performs RNG initialization is allowed to return a status code of 7000_0000h, since last command in the descriptor is a JUMP HALT. Signed-off-by: NHoria Geant? <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Horia Geant? 提交于
HW coherency won't work properly for CAAM write transactions if AWCACHE is left to default (POR) value - 4'b0001. It has to be programmed to 4'b0010, i.e. AXI3 Cacheable bit set. For platforms that have HW coherency support: -PPC-based: the update has no effect; CAAM coherency already works due to the IOMMU (PAMU) driver setting the correct memory coherency attributes -ARM-based: the update fixes cache coherency issues, since IOMMU (SMMU) driver is not programmed to behave similar to PAMU Signed-off-by: NHoria Geant? <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Alex Porosanu 提交于
In order to ensure that the ERA property is properly read from DT on all platforms, of_property_read* function needs to be used. Signed-off-by: NAlex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by: NHoria Geant? <horia.geanta@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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