1. 26 3月, 2018 2 次提交
  2. 03 11月, 2017 1 次提交
  3. 06 10月, 2017 1 次提交
    • A
      spi: spreadtrum adi: add hwspinlock dependency · e83f3742
      Arnd Bergmann 提交于
      With CONFIG_HWSPINLOCK=m, the new driver fails to link as a built-in driver:
      
      drivers/spi/spi-sprd-adi.o: In function `sprd_adi_remove':
      spi-sprd-adi.c:(.text+0x18): undefined reference to `hwspin_lock_free'
      drivers/spi/spi-sprd-adi.o: In function `sprd_adi_probe':
      spi-sprd-adi.c:(.text+0xfc): undefined reference to `of_hwspin_lock_get_id'
      spi-sprd-adi.c:(.text+0x108): undefined reference to `hwspin_lock_request_specific'
      spi-sprd-adi.c:(.text+0x268): undefined reference to `hwspin_lock_free'
      
      This adds a hard Kconfig dependency on HWSPINLOCK for the !COMPILE_TEST
      case, and allows compile-testing with HWSPINLOCK completely disabled,
      which will then rely on the existing stub API.
      
      Fixes: 7e2903cb ("spi: Add ADI driver for Spreadtrum platform")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      e83f3742
  4. 20 9月, 2017 1 次提交
  5. 19 9月, 2017 1 次提交
  6. 16 8月, 2017 1 次提交
    • L
      spi: altera: Switch to SPI core transfer queue management · e19b63cd
      Lars-Peter Clausen 提交于
      The Altera SPI driver currently uses the spi-bitbang infrastructure for
      transfer queue management, but non of the bitbang functionality itself.
      This is because when the driver was written this was the only way to not
      have to do queue management in the driver itself.
      
      Nowadays transfer queue management is available from the SPI driver core
      itself and using the bitbang infrastructure just adds an additional level
      of indirection.
      
      Switch the driver over to using the core queue management directly.
      Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      e19b63cd
  7. 07 8月, 2017 1 次提交
    • A
      spi: fix building SPI_PXA on MMP · 128345b1
      Arnd Bergmann 提交于
      When the audio driver selects CONFIG_PXA_SSP on ARCH_MMP as a
      loadable module, and the PXA SPI driver is built-in, we get
      a link error in the SPI driver:
      
      drivers/spi/spi-pxa2xx.o: In function `pxa2xx_spi_remove':
      spi-pxa2xx.c:(.text+0x5f0): undefined reference to `pxa_ssp_free'
      drivers/spi/spi-pxa2xx.o: In function `pxa2xx_spi_probe':
      spi-pxa2xx.c:(.text+0xeac): undefined reference to `pxa_ssp_request'
      spi-pxa2xx.c:(.text+0x1468): undefined reference to `pxa_ssp_free'
      spi-pxa2xx.c:(.text+0x15bc): undefined reference to `pxa_ssp_free'
      
      The problem is that the PXA SPI driver only uses 'select SSP'
      specifically when building it for PXA, but we can also build it
      for PCI, which is meant for Intel x86 SoCs that use the same SPI
      block. When the sound driver forces the SSP to be a loadable
      module, the IS_ENABLED() check in include/linux/pxa2xx_ssp.h
      triggers but the spi driver can't reference the exported symbols.
      
      I had a different approach before, making the PCI case depend
      on X86, which fixed the problem by avoiding the MMP case.
      
      This goes a different route, making the driver select PXA_SSP
      also on MMP, which has an SSP that none of the boards in mainline
      Linux use for SPI. There is no harm in always enabling the build
      on MMP (PCI or not PCI), so I do that too, to document that this
      hardware is actually available on MMP.
      
      Link: https://patchwork.kernel.org/patch/8879921/Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      128345b1
  8. 21 6月, 2017 1 次提交
  9. 26 5月, 2017 3 次提交
  10. 25 5月, 2017 1 次提交
  11. 14 5月, 2017 1 次提交
  12. 14 3月, 2017 1 次提交
  13. 20 2月, 2017 1 次提交
  14. 15 2月, 2017 1 次提交
    • H
      spi: lantiq-ssc: add support for Lantiq SSC SPI controller · 17f84b79
      Hauke Mehrtens 提交于
      This driver supports the Lantiq SSC SPI controller in master
      mode. This controller is found on Intel (former Lantiq) SoCs like
      the Danube, Falcon, xRX200, xRX300.
      
      The hardware uses two hardware FIFOs one for received and one for
      transferred bytes. When the driver writes data into the transmit FIFO
      the complete word is taken from the FIFO into a shift register. The
      data from this shift register is then written to the wire. This driver
      uses the interrupts signaling the status of the FIFOs and not the shift
      register. It is also possible to use the interrupts for the shift
      register, but they will send a signal after every word. When using the
      interrupts for the shift register we get a signal when the last word is
      written into the shift register and not when it is written to the wire.
      After all FIFOs are empty the driver busy waits till the hardware is
      not busy any more and returns the transfer status.
      Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
      Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      17f84b79
  15. 10 1月, 2017 1 次提交
  16. 01 1月, 2017 1 次提交
  17. 14 12月, 2016 1 次提交
  18. 09 12月, 2016 1 次提交
  19. 01 12月, 2016 1 次提交
  20. 23 11月, 2016 1 次提交
  21. 14 11月, 2016 1 次提交
  22. 09 11月, 2016 1 次提交
  23. 15 9月, 2016 1 次提交
  24. 02 9月, 2016 1 次提交
  25. 19 8月, 2016 1 次提交
  26. 08 8月, 2016 1 次提交
    • R
      spi: add driver for J-Core SPI controller · 2cb1b3b3
      Rich Felker 提交于
      The J-Core "spi2" device is a PIO-based SPI master controller. It
      differs from "bitbang" devices in that that it's clocked in hardware
      rather than via soft clock modulation over gpio, and performs
      byte-at-a-time transfers between the cpu and SPI controller.
      
      This driver will be extended to support future versions of the J-Core
      SPI controller with DMA transfers when they become available.
      Signed-off-by: NRich Felker <dalias@libc.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      2cb1b3b3
  27. 08 7月, 2016 1 次提交
  28. 13 5月, 2016 1 次提交
    • P
      spi: pic32-sqi: Fix linker error, undefined reference to `bad_dma_ops'. · 21825ff1
      Purna Chandra Mandal 提交于
      Even if DMA support is disabled code using DMA mapping APIs compiles fine,
      but fails in linking.
      -------
      drivers/built-in.o: In function `ring_desc_ring_free':
      spi-pic32-sqi.c:(.text+0x2cfbe0): undefined reference to `bad_dma_ops'
      spi-pic32-sqi.c:(.text+0x2cfbe4): undefined reference to `bad_dma_ops'
      drivers/built-in.o: In function `pic32_sqi_probe':
      spi-pic32-sqi.c:(.text+0x2cfe48): undefined reference to `bad_dma_ops'
      spi-pic32-sqi.c:(.text+0x2cfeb0): undefined reference to `bad_dma_ops'
      spi-pic32-sqi.c:(.text+0x2cff38): undefined reference to `bad_dma_ops'
      --------
      Correct dependency by adding 'depends on HAS_DMA' in Kconfig.
      Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      21825ff1
  29. 02 5月, 2016 1 次提交
  30. 30 4月, 2016 1 次提交
  31. 22 4月, 2016 1 次提交
  32. 19 4月, 2016 1 次提交
  33. 05 4月, 2016 1 次提交
  34. 23 3月, 2016 1 次提交
  35. 24 2月, 2016 1 次提交
  36. 18 2月, 2016 1 次提交
  37. 14 2月, 2016 1 次提交