1. 05 4月, 2019 2 次提交
  2. 04 4月, 2019 1 次提交
  3. 27 3月, 2019 1 次提交
    • A
      Revert "gpio: use new gpio_set_config() helper in more places" · fa59dd23
      Andrew Jeffery 提交于
      gpio-aspeed implements support for PIN_CONFIG_INPUT_DEBOUNCE. As of
      v5.1-rc1 we're seeing the following when booting a Romulus BMC kernel:
      
      > [   21.373137] ------------[ cut here ]------------
      > [   21.374545] WARNING: CPU: 0 PID: 1 at drivers/gpio/gpio-aspeed.c:834 unregister_allocated_timer+0x38/0x94
      > [   21.376181] No timer allocated to offset 74
      > [   21.377672] CPU: 0 PID: 1 Comm: swapper Not tainted 5.1.0-rc1-dirty #6
      > [   21.378800] Hardware name: Generic DT based system
      > [   21.379965] Backtrace:
      > [   21.381024] [<80107d44>] (dump_backtrace) from [<80107f78>] (show_stack+0x20/0x24)
      > [   21.382713]  r7:8038b720 r6:00000009 r5:00000000 r4:87897c64
      > [   21.383815] [<80107f58>] (show_stack) from [<80656398>] (dump_stack+0x20/0x28)
      > [   21.385042] [<80656378>] (dump_stack) from [<80115f1c>] (__warn.part.3+0xb4/0xdc)
      > [   21.386253] [<80115e68>] (__warn.part.3) from [<80115fb0>] (warn_slowpath_fmt+0x6c/0x90)
      > [   21.387471]  r6:00000342 r5:807f8758 r4:80a07008
      > [   21.388278] [<80115f48>] (warn_slowpath_fmt) from [<8038b720>] (unregister_allocated_timer+0x38/0x94)
      > [   21.389809]  r3:0000004a r2:807f8774
      > [   21.390526]  r7:00000000 r6:0000000a r5:60000153 r4:0000004a
      > [   21.391601] [<8038b6e8>] (unregister_allocated_timer) from [<8038baac>] (aspeed_gpio_set_config+0x330/0x48c)
      > [   21.393248] [<8038b77c>] (aspeed_gpio_set_config) from [<803840b0>] (gpiod_set_debounce+0xe8/0x114)
      > [   21.394745]  r10:82ee2248 r9:00000000 r8:87b63a00 r7:00001388 r6:87947320 r5:80729310
      > [   21.396030]  r4:879f64a0
      > [   21.396499] [<80383fc8>] (gpiod_set_debounce) from [<804b4350>] (gpio_keys_probe+0x69c/0x8e0)
      > [   21.397715]  r7:845d94b8 r6:00000001 r5:00000000 r4:87b63a1c
      > [   21.398618] [<804b3cb4>] (gpio_keys_probe) from [<8040eeec>] (platform_dev_probe+0x44/0x80)
      > [   21.399834]  r10:00000003 r9:80a3a8b0 r8:00000000 r7:00000000 r6:80a7f9dc r5:80a3a8b0
      > [   21.401163]  r4:8796bc10
      > [   21.401634] [<8040eea8>] (platform_drv_probe) from [<8040d0d4>] (really_probe+0x208/0x3dc)
      > [   21.402786]  r5:80a7f8d0 r4:8796bc10
      > [   21.403547] [<8040cecc>] (really_probe) from [<8040d7a4>] (driver_probe_device+0x130/0x170)
      > [   21.404744]  r10:0000007b r9:8093683c r8:00000000 r7:80a07008 r6:80a3a8b0 r5:8796bc10
      > [   21.405854]  r4:80a3a8b0
      > [   21.406324] [<8040d674>] (driver_probe_device) from [<8040da8c>] (device_driver_attach+0x68/0x70)
      > [   21.407568]  r9:8093683c r8:00000000 r7:80a07008 r6:80a3a8b0 r5:00000000 r4:8796bc10
      > [   21.408877] [<8040da24>] (device_driver_attach) from [<8040db14>] (__driver_attach+0x80/0x150)
      > [   21.410327]  r7:80a07008 r6:8796bc10 r5:00000001 r4:80a3a8b0
      > [   21.411294] [<8040da94>] (__driver_attach) from [<8040b20c>] (bus_for_each_dev+0x80/0xc4)
      > [   21.412641]  r7:80a07008 r6:8040da94 r5:80a3a8b0 r4:87966f30
      > [   21.413580] [<8040b18c>] (bus_for_each_dev) from [<8040dc0c>] (driver_attach+0x28/0x30)
      > [   21.414943]  r7:00000000 r6:87b411e0 r5:80a33fc8 r4:80a3a8b0
      > [   21.415927] [<8040dbe4>] (driver_attach) from [<8040bbf0>] (bus_add_driver+0x14c/0x200)
      > [   21.417289] [<8040baa4>] (bus_add_driver) from [<8040e2b4>] (driver_register+0x84/0x118)
      > [   21.418652]  r7:80a60ae0 r6:809226b8 r5:80a07008 r4:80a3a8b0
      > [   21.419652] [<8040e230>] (driver_register) from [<8040fc28>] (__platform_driver_register+0x3c/0x50)
      > [   21.421193]  r5:80a07008 r4:809525f8
      > [   21.421990] [<8040fbec>] (__platform_driver_register) from [<809226d8>] (gpio_keys_init+0x20/0x28)
      > [   21.423447] [<809226b8>] (gpio_keys_init) from [<8090128c>] (do_one_initcall+0x80/0x180)
      > [   21.424886] [<8090120c>] (do_one_initcall) from [<80901538>] (kernel_init_freeable+0x1ac/0x26c)
      > [   21.426354]  r8:80a60ae0 r7:80a60ae0 r6:8093685c r5:00000008 r4:809525f8
      > [   21.427579] [<8090138c>] (kernel_init_freeable) from [<8066d9a0>] (kernel_init+0x18/0x11c)
      > [   21.428819]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:8066d988
      > [   21.429947]  r4:00000000
      > [   21.430415] [<8066d988>] (kernel_init) from [<801010e8>] (ret_from_fork+0x14/0x2c)
      > [   21.431666] Exception stack(0x87897fb0 to 0x87897ff8)
      > [   21.432877] 7fa0:                                     00000000 00000000 00000000 00000000
      > [   21.434446] 7fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      > [   21.436052] 7fe0: 00000000 00000000 00000000 00000000 00000013 00000000
      > [   21.437308]  r5:8066d988 r4:00000000
      > [   21.438102] ---[ end trace d7d7ac3a80567d0e ]---
      
      We only hit unregister_allocated_timer() if the argument to
      aspeed_gpio_set_config() is 0, but we can't be calling through
      gpiod_set_debounce() from gpio_keys_probe() unless the gpio-keys button has a
      non-zero debounce interval.
      
      Commit 6581eaf0 ("gpio: use new gpio_set_config() helper in more places")
      spreads the use of gpio_set_config() to the debounce and transitory
      state configuration paths. The implementation of gpio_set_config() is:
      
      > static int gpio_set_config(struct gpio_chip *gc, unsigned offset,
      > 			   enum pin_config_param mode)
      > {
      > 	unsigned long config = { PIN_CONF_PACKED(mode, 0) };
      >
      > 	return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP;
      > }
      
      Here it packs its own config value with a fixed argument of 0; this is
      incorrect behaviour for implementing the debounce and transitory functions, and
      the debounce and transitory gpio_set_config() call-sites now have an undetected
      type mismatch as they both already pack their own config parameter (i.e. what
      gets passed is not an `enum pin_config_param`). Indeed this can be seen in the
      small diff for 6581eaf0:
      
      > diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
      > index de595fa31a1a..1f239aac43df 100644
      > --- a/drivers/gpio/gpiolib.c
      > +++ b/drivers/gpio/gpiolib.c
      > @@ -2725,7 +2725,7 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
      >         }
      >
      >         config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
      > -       return chip->set_config(chip, gpio_chip_hwgpio(desc), config);
      > +       return gpio_set_config(chip, gpio_chip_hwgpio(desc), config);
      >  }
      >  EXPORT_SYMBOL_GPL(gpiod_set_debounce);
      >
      > @@ -2762,7 +2762,7 @@ int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
      >         packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
      >                                           !transitory);
      >         gpio = gpio_chip_hwgpio(desc);
      > -       rc = chip->set_config(chip, gpio, packed);
      > +       rc = gpio_set_config(chip, gpio, packed);
      >         if (rc == -ENOTSUPP) {
      >                 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
      >                                 gpio);
      
      Revert commit 6581eaf0 ("gpio: use new gpio_set_config() helper in
      more places") to restore correct behaviour for gpiod_set_debounce() and
      gpiod_set_transitory().
      
      Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
      Signed-off-by: NAndrew Jeffery <andrew@aj.id.au>
      Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
      fa59dd23
  4. 13 2月, 2019 3 次提交
  5. 24 1月, 2019 2 次提交
  6. 14 12月, 2018 1 次提交
  7. 11 12月, 2018 1 次提交
  8. 15 11月, 2018 1 次提交
  9. 09 11月, 2018 1 次提交
  10. 05 11月, 2018 2 次提交
  11. 16 10月, 2018 3 次提交
  12. 13 10月, 2018 1 次提交
    • L
      regulator/gpio: Allow nonexclusive GPIO access · b0ce7b29
      Linus Walleij 提交于
      This allows nonexclusive (simultaneous) access to a single
      GPIO line for the fixed regulator enable line. This happens
      when several regulators use the same GPIO for enabling and
      disabling a regulator, and all need a handle on their GPIO
      descriptor.
      
      This solution with a special flag is not entirely elegant
      and should ideally be replaced by something more careful as
      this makes it possible for several consumers to
      enable/disable the same GPIO line to the left and right
      without any consistency. The current use inside the regulator
      core should however be fine as it takes special care to
      handle this.
      
      For the state of the GPIO backend, this is still the
      lesser evil compared to going back to global GPIO
      numbers.
      
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Cc: Jon Hunter <jonathanh@nvidia.com>
      Fixes: efdfeb07 ("regulator: fixed: Convert to use GPIO descriptor only")
      Reported-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Tested-by: NJon Hunter <jonathanh@nvidia.com>
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      b0ce7b29
  13. 12 10月, 2018 1 次提交
  14. 10 10月, 2018 4 次提交
    • S
      gpio: Assign gpio_irq_chip::parents to non-stack pointer · 3e779a2e
      Stephen Boyd 提交于
      gpiochip_set_cascaded_irqchip() is passed 'parent_irq' as an argument
      and then the address of that argument is assigned to the gpio chips
      gpio_irq_chip 'parents' pointer shortly thereafter. This can't ever
      work, because we've just assigned some stack address to a pointer that
      we plan to dereference later in gpiochip_irq_map(). I ran into this
      issue with the KASAN report below when gpiochip_irq_map() tried to setup
      the parent irq with a total junk pointer for the 'parents' array.
      
      BUG: KASAN: stack-out-of-bounds in gpiochip_irq_map+0x228/0x248
      Read of size 4 at addr ffffffc0dde472e0 by task swapper/0/1
      
      CPU: 7 PID: 1 Comm: swapper/0 Not tainted 4.14.72 #34
      Call trace:
      [<ffffff9008093638>] dump_backtrace+0x0/0x718
      [<ffffff9008093da4>] show_stack+0x20/0x2c
      [<ffffff90096b9224>] __dump_stack+0x20/0x28
      [<ffffff90096b91c8>] dump_stack+0x80/0xbc
      [<ffffff900845a350>] print_address_description+0x70/0x238
      [<ffffff900845a8e4>] kasan_report+0x1cc/0x260
      [<ffffff900845aa14>] __asan_report_load4_noabort+0x2c/0x38
      [<ffffff900897e098>] gpiochip_irq_map+0x228/0x248
      [<ffffff900820cc08>] irq_domain_associate+0x114/0x2ec
      [<ffffff900820d13c>] irq_create_mapping+0x120/0x234
      [<ffffff900820da78>] irq_create_fwspec_mapping+0x4c8/0x88c
      [<ffffff900820e2d8>] irq_create_of_mapping+0x180/0x210
      [<ffffff900917114c>] of_irq_get+0x138/0x198
      [<ffffff9008dc70ac>] spi_drv_probe+0x94/0x178
      [<ffffff9008ca5168>] driver_probe_device+0x51c/0x824
      [<ffffff9008ca6538>] __device_attach_driver+0x148/0x20c
      [<ffffff9008ca14cc>] bus_for_each_drv+0x120/0x188
      [<ffffff9008ca570c>] __device_attach+0x19c/0x2dc
      [<ffffff9008ca586c>] device_initial_probe+0x20/0x2c
      [<ffffff9008ca18bc>] bus_probe_device+0x80/0x154
      [<ffffff9008c9b9b4>] device_add+0x9b8/0xbdc
      [<ffffff9008dc7640>] spi_add_device+0x1b8/0x380
      [<ffffff9008dcbaf0>] spi_register_controller+0x111c/0x1378
      [<ffffff9008dd6b10>] spi_geni_probe+0x4dc/0x6f8
      [<ffffff9008cab058>] platform_drv_probe+0xdc/0x130
      [<ffffff9008ca5168>] driver_probe_device+0x51c/0x824
      [<ffffff9008ca59cc>] __driver_attach+0x100/0x194
      [<ffffff9008ca0ea8>] bus_for_each_dev+0x104/0x16c
      [<ffffff9008ca58c0>] driver_attach+0x48/0x54
      [<ffffff9008ca1edc>] bus_add_driver+0x274/0x498
      [<ffffff9008ca8448>] driver_register+0x1ac/0x230
      [<ffffff9008caaf6c>] __platform_driver_register+0xcc/0xdc
      [<ffffff9009c4b33c>] spi_geni_driver_init+0x1c/0x24
      [<ffffff9008084cb8>] do_one_initcall+0x240/0x3dc
      [<ffffff9009c017d0>] kernel_init_freeable+0x378/0x468
      [<ffffff90096e8240>] kernel_init+0x14/0x110
      [<ffffff9008086fcc>] ret_from_fork+0x10/0x18
      
      The buggy address belongs to the page:
      page:ffffffbf037791c0 count:0 mapcount:0 mapping:          (null) index:0x0
      flags: 0x4000000000000000()
      raw: 4000000000000000 0000000000000000 0000000000000000 00000000ffffffff
      raw: ffffffbf037791e0 ffffffbf037791e0 0000000000000000 0000000000000000
      page dumped because: kasan: bad access detected
      
      Memory state around the buggy address:
       ffffffc0dde47180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
       ffffffc0dde47200: f1 f1 f1 f1 f8 f8 f8 f8 f8 f8 f8 f8 f8 f8 f2 f2
      >ffffffc0dde47280: f2 f2 00 00 00 00 00 00 00 00 00 00 f3 f3 f3 f3
                                                             ^
       ffffffc0dde47300: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
       ffffffc0dde47380: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
      
      Let's leave around one unsigned int in the gpio_irq_chip struct for the
      single parent irq case and repoint the 'parents' array at it. This way
      code is left mostly intact to setup parents and we waste an extra few
      bytes per structure of which there should be only a handful in a system.
      
      Cc: Evan Green <evgreen@chromium.org>
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Grygorii Strashko <grygorii.strashko@ti.com>
      Fixes: e0d89728 ("gpio: Implement tighter IRQ chip integration")
      Signed-off-by: NStephen Boyd <swboyd@chromium.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3e779a2e
    • U
      gpio: fix doc string for devm_gpiochip_add_data() to not talk about irq_chip · 3925b90f
      Uwe Kleine-König 提交于
      The function is about adding a gpio_chip so dev has to belong to this
      one. Fix wording to be more grammatically correct (but attention, I'm
      not a native speaker).
      Signed-off-by: NUwe Kleine-König <uwe@kleine-koenig.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3925b90f
    • R
      gpiolib: Show correct direction from the beginning · 3edfb7bd
      Ricardo Ribalda Delgado 提交于
      Current code assumes that the direction is input if direction_input
      function is set.
      This might not be the case on GPIOs with programmable direction.
      Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
      Tested-by: NJeffrey Hugo <jhugo@codeaurora.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3edfb7bd
    • R
      gpiolib: Add init_valid_mask exported function · f8ec92a9
      Ricardo Ribalda Delgado 提交于
      Add a function that allows initializing the valid_mask from
      gpiochip_add_data.
      
      This prevents race conditions during gpiochip initialization.
      
      If the function is not exported, then the old behaviour is respected,
      this is, set all gpios as valid.
      Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
      Tested-by: NJeffrey Hugo <jhugo@codeaurora.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      f8ec92a9
  15. 02 10月, 2018 1 次提交
  16. 01 10月, 2018 3 次提交
  17. 25 9月, 2018 3 次提交
  18. 24 9月, 2018 2 次提交
    • J
      gpiolib: Fix array members of same chip processed separately · c4c958aa
      Janusz Krzysztofik 提交于
      New code introduced by commit bf9346f5 ("gpiolib: Identify arrays
      matching GPIO hardware") forcibly tries to find an array member which
      has its array index number equal to its hardware pin number and set
      up an array info for possible fast bitmap processing of all arrray
      pins belonging to that chip which also satisfy that numbering rule.
      
      Depending on array content, it may happen that consecutive array
      members which belong to the same chip but don't have array indexes
      equal to their pin hardware numbers will be split into groups, some of
      them processed together via the fast bitmap path, and rest of them
      separetely.  However, applications may expect all those pins being
      processed together with a single call to .set_multiple() chip callback,
      like that was done before the change.
      
      Limit applicability of fast bitmap processing path to cases where all
      pins of consecutive array members starting from 0 which belong to the
      same chip have their hardware numbers equal to their corresponding
      array indexes.  That should still speed up processing of applications
      using whole GPIO banks as I/O ports, while not breaking simultaneous
      manipulation of consecutive pins of the same chip which don't follow
      the equal numbering rule.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c4c958aa
    • J
      gpiolib: Fix missing updates of bitmap index · 35ae7f96
      Janusz Krzysztofik 提交于
      In new code introduced by commit b17566a6 ("gpiolib: Implement fast
      processing path in get/set array"), bitmap index is not updated with
      next found zero bit position as it should while skipping over pins
      already processed via fast bitmap path, possibly resulting in an
      infinite loop.  Fix it.
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      35ae7f96
  19. 19 9月, 2018 1 次提交
  20. 17 9月, 2018 1 次提交
  21. 14 9月, 2018 1 次提交
  22. 13 9月, 2018 4 次提交
    • J
      gpiolib: Implement fast processing path in get/set array · b17566a6
      Janusz Krzysztofik 提交于
      Certain GPIO descriptor arrays returned by gpio_get_array() may contain
      information on direct mapping of array members to pins of a single GPIO
      chip in hardware order.  In such cases, bitmaps of values can be passed
      directly from/to the chip's .get/set_multiple() callbacks without
      wasting time on iterations.
      
      Add respective code to gpiod_get/set_array_bitmap_complex() functions.
      Pins not applicable for fast path are processed as before, skipping
      over the 'fast' ones.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b17566a6
    • J
      gpiolib: Pass array info to get/set array functions · 77588c14
      Janusz Krzysztofik 提交于
      In order to make use of array info obtained from gpiod_get_array() and
      speed up processing of arrays matching single GPIO chip layout, that
      information must be passed to get/set array functions.  Extend the
      functions' API with that additional parameter and update all users.
      Pass NULL if a user builds an array itself from single GPIOs.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Miguel Ojeda Sandonis <miguel.ojeda.sandonis@gmail.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
      Cc: Lukas Wunner <lukas@wunner.de>
      Cc: Peter Korsgaard <peter.korsgaard@barco.com>
      Cc: Peter Rosin <peda@axentia.se>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Rojhalat Ibrahim <imr@rtschenk.de>
      Cc: Dominik Brodowski <linux@dominikbrodowski.net>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Lars-Peter Clausen <lars@metafoo.de>
      Cc: Michael Hennerich <Michael.Hennerich@analog.com>
      Cc: Jonathan Cameron <jic23@kernel.org>
      Cc: Hartmut Knaack <knaack.h@gmx.de>
      Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: Yegor Yefremov <yegorslists@googlemail.com>
      Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      77588c14
    • J
      gpiolib: Identify arrays matching GPIO hardware · bf9346f5
      Janusz Krzysztofik 提交于
      Certain GPIO array lookup results may map directly to GPIO pins of a
      single GPIO chip in hardware order.  If that condition is recognized
      and handled efficiently, significant performance gain of get/set array
      functions may be possible.
      
      While processing a request for an array of GPIO descriptors, identify
      those which represent corresponding pins of a single GPIO chip.  Skip
      over pins which require open source or open drain special processing.
      Moreover, identify pins which require inversion.  Pass a pointer to
      that information with the array to the caller so it can benefit from
      enhanced performance as soon as get/set array functions can accept and
      make efficient use of it.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      bf9346f5
    • J
      gpiolib: Pass bitmaps, not integer arrays, to get/set array · b9762beb
      Janusz Krzysztofik 提交于
      Most users of get/set array functions iterate consecutive bits of data,
      usually a single integer, while processing array of results obtained
      from, or building an array of values to be passed to those functions.
      Save time wasted on those iterations by changing the functions' API to
      accept bitmaps.
      
      All current users are updated as well.
      
      More benefits from the change are expected as soon as planned support
      for accepting/passing those bitmaps directly from/to respective GPIO
      chip callbacks if applicable is implemented.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Miguel Ojeda Sandonis <miguel.ojeda.sandonis@gmail.com>
      Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
      Cc: Lukas Wunner <lukas@wunner.de>
      Cc: Peter Korsgaard <peter.korsgaard@barco.com>
      Cc: Peter Rosin <peda@axentia.se>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Rojhalat Ibrahim <imr@rtschenk.de>
      Cc: Dominik Brodowski <linux@dominikbrodowski.net>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Lars-Peter Clausen <lars@metafoo.de>
      Cc: Michael Hennerich <Michael.Hennerich@analog.com>
      Cc: Jonathan Cameron <jic23@kernel.org>
      Cc: Hartmut Knaack <knaack.h@gmx.de>
      Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: Yegor Yefremov <yegorslists@googlemail.com>
      Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b9762beb