1. 05 10月, 2019 3 次提交
  2. 04 10月, 2019 1 次提交
  3. 02 10月, 2019 1 次提交
  4. 28 9月, 2019 2 次提交
  5. 26 9月, 2019 1 次提交
  6. 24 9月, 2019 6 次提交
  7. 17 9月, 2019 3 次提交
  8. 14 9月, 2019 3 次提交
  9. 11 9月, 2019 4 次提交
  10. 10 9月, 2019 1 次提交
  11. 06 9月, 2019 13 次提交
  12. 04 9月, 2019 2 次提交
    • M
      net/mlx5: Add devlink flow_steering_mode parameter · e890acd5
      Maor Gottlieb 提交于
      Add new parameter (flow_steering_mode) to control the flow steering
      mode of the driver.
      Two modes are supported:
      1. DMFS - Device managed flow steering
      2. SMFS - Software/Driver managed flow steering.
      
      In the DMFS mode, the HW steering entities are created through the
      FW. In the SMFS mode this entities are created though the driver
      directly.
      
      The driver will use the devlink steering mode only if the steering
      domain supports it, for now SMFS will manages only the switchdev eswitch
      steering domain.
      
      User command examples:
      - Set SMFS flow steering mode::
      
          $ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime
      
      - Read device flow steering mode::
      
          $ devlink dev param show pci/0000:06:00.0 name flow_steering_mode
            pci/0000:06:00.0:
            name flow_steering_mode type driver-specific
            values:
               cmode runtime value smfs
      Signed-off-by: NMaor Gottlieb <maorg@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      e890acd5
    • M
      net/mlx5: Add support to use SMFS in switchdev mode · 8463daf1
      Maor Gottlieb 提交于
      In case that flow steering mode of the driver is SMFS (Software Managed
      Flow Steering), then use the DR (SW steering) API to create the steering
      objects.
      
      In addition, add a call to the set peer namespace when switchdev gets
      devcom pair event. It is required to support VF LAG in SMFS.
      Signed-off-by: NMaor Gottlieb <maorg@mellanox.com>
      Reviewed-by: NMark Bloch <markb@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      8463daf1