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    • J
      MXC family: Add clock handling · c0db2ea4
      Juergen Beisert 提交于
      Internal clock path handling for the mxc CPUs.
      
      Changed against the original Freescale code (and against clocklib for example):
       - clock rate is always calculated whenever one ask for the current rate
         (means struct clk has no more a member called "rate"). So switching the PLL
         base frequency will propagate immediately to all other clocks that are
         depending on this frequency.
      Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
      c0db2ea4