- 17 2月, 2012 1 次提交
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由 Dave Airlie 提交于
The current enabling of bus mastering in the drm midlayer allows a large race condition under kexec. When a kexec'ed kernel re-enables bus mastering for the GPU, previously setup dma blocks may cause writes to random pieces of memory. On radeon the writeback mechanism can cause these sorts of issues. This patch doesn't fix the problem, but it moves the bus master enable under the individual drivers control so they can move enabling it until later in their load cycle and close the race. Fix for radeon kms driver will be in a follow-up patch. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 01 11月, 2011 1 次提交
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由 Paul Gortmaker 提交于
So that we don't get build failures once the implicit module.h presence is removed. Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 13 7月, 2011 1 次提交
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由 Jon Mason 提交于
drm_pci_device_is_pcie duplicates the funcationality of pci_is_pcie. Convert callers of the former to the latter. This has the side benefit of removing an unnecessary search in the PCI configuration space due to using a saved PCIe capability offset. [airlied: update for new callsite] Signed-off-by: NJon Mason <jdmason@kudzu.us> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 07 2月, 2011 1 次提交
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由 Dave Airlie 提交于
This abstracts the pci/platform interface out a step further, we can go further but this is far enough for now to allow USB to be plugged in. The drivers now just call the init code directly for their device type. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 01 6月, 2010 1 次提交
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由 Jordan Crouse 提交于
Remove the drm_resource wrappers and directly use the actual PCI and/or platform functions in their place. [airlied: fixup nouveau properly to build] Signed-off-by: NJordan Crouse <jcrouse@codeaurora.org> Reviewed-by: NMatt Turner <mattst88@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 23 4月, 2010 1 次提交
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由 Tormod Volden 提交于
Although these cards have 2 pipelines on the silicon only the first passed the QA and the other should be disabled. http://www.digital-daily.com/video/ati-radeon9800se/ http://www.rojakpot.com/showarticle.aspx?artno=101&pgno=1 agd5f: add some other SE cards as well; fix up kms Signed-off-by: NTormod Volden <debian.tormod@gmail.com> Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 06 4月, 2010 1 次提交
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由 Michel Dänzer 提交于
Gleaned from the Mesa code. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=27355 . Signed-off-by: NMichel Dänzer <daenzer@vmware.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 01 3月, 2010 1 次提交
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由 Dave Airlie 提交于
radeon's have a special ability to passthrough writes in their internal memory space directly to PCI, this ability means that if some of the internal surfaces like the depth buffer point at 0x0, any writes to these will go directly to RAM at 0x0 via PCI busmastering. Now mesa used to always emit clears after emitting state, since the radeon mesa driver was refactored a year or more ago, it was found it could generate a clear request without ever sending any setup state to the card. So the clear would attempt to clear the depth buffer at 0x0, which would overwrite main memory at this point. fs corruption ensues. Also once one app did this correctly, it would never get set back to 0 making this messy to reproduce. The kernel should block this from happening as mesa runs without privs, though it does require the user be connected to the current running X session. This patch implements a check to make sure the depth offset has been set before a depth clear occurs and if it finds one it prints a warning and ignores the depth clear request. There is also a mesa fix to avoid sending the badness going into mesa. This only affects r100/r200 GPUs in user modesetting mode. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 07 1月, 2010 1 次提交
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由 Jiri Slaby 提交于
Stanse found a memory leak in radeon_master_create. master_priv is not freed/assigned on all paths. Fix that. Signed-off-by: NJiri Slaby <jslaby@suse.cz> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 26 10月, 2009 1 次提交
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由 Robert Noland 提交于
Fix the main loop to search all buffers before sleeping. Remove dead code Signed-off-by: NRobert Noland <rnoland@2hip.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 21 9月, 2009 1 次提交
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由 Alex Deucher 提交于
This patch makes sure the CP doesn't DMA do VRAM while 2D is active by inserting a CP resync token. todo: port to kms. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 31 8月, 2009 1 次提交
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由 Ben Hutchings 提交于
Loosely based on a patch by Jaswinder Singh Rajput <jaswinderlinux@gmail.com>. KMS support by Dave Airlie <airlied@redhat.com>. For Radeon 100- to 500-series, firmware blobs look like: struct { __be32 datah; __be32 datal; } cp_ucode[256]; For Radeon 600-series, there are two separate firmware blobs: __be32 me_ucode[PM4_UCODE_SIZE * 3]; __be32 pfp_ucode[PFP_UCODE_SIZE]; For Radeon 700-series, likewise: __be32 me_ucode[R700_PM4_UCODE_SIZE]; __be32 pfp_ucode[R700_PFP_UCODE_SIZE]; Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 21 8月, 2009 1 次提交
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由 Alex Deucher 提交于
Needed for occlusion queries on rv530 chips. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 19 6月, 2009 1 次提交
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由 Eric Anholt 提交于
It hasn't been used in ages, and having the user tell your how much memory is being freed at free time is a recipe for disaster even if it was ever used. Signed-off-by: NEric Anholt <eric@anholt.net>
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- 11 6月, 2009 1 次提交
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由 Dave Airlie 提交于
This shouldn't be there and is what broke r600 late in the 2.6.30 release cycle with Ben's patch. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 04 6月, 2009 1 次提交
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由 Dave Airlie 提交于
fd.o bz#21849 We were aligning to +16 dwords, instead of to the next 16dword boundary in the ring. Fix the calculation to go to the next 16dword boundary when space checking. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 29 3月, 2009 1 次提交
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由 Maciej Cencora 提交于
[airlied: cleaned up slightly for drm-next] Signed-off-by: NMaciej Cencora <m.cencora@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 13 3月, 2009 11 次提交
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由 Hannes Eder 提交于
Fix this sparse warning: drivers/gpu/drm/radeon/r600_cp.c:1811:52: warning: Using plain integer as NULL pointer drivers/gpu/drm/radeon/radeon_cp.c:1363:52: warning: Using plain integer as NULL pointer drivers/gpu/drm/radeon/radeon_state.c:1983:61: warning: Using plain integer as NULL pointer Signed-off-by: NHannes Eder <hannes@hanneseder.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
This calls the correct idle function for the R600 and previous chips. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
RS600s are an AMD IGP for Intel CPUs, that look like RS690s from a lot of perspectives but look like r600s from a memory controller point of view. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
This adds support for 2D/Xv acceleration in the X.org 2D driver, to the drm. It doesn't yet provide any 3D support hooks. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
- add r6xx/r7xx regs and macros - add r6xx/r7xx chip families - fix register access for regs with offsets >= 0x10000 Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
this is just a code cleanup from the kms tree. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
On some radeon GPUs this appears to introduce another level of stability around interacting with the ring. Its pretty much what fglrx appears to do. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 David Miller 提交于
This allocates a physical surface for the PCI GART table, this way no matter what other surface configurations exist the GART table will always be seen by the hardware properly. We encode the file pointer of the virtual surface allocate using a special cookie value, called PCIGART_FILE_PRIV. On the last close, we release that surface. Just to be doubly safe, we run the pcigart table setup with the main surface control register clear. Based upon ideas from David Airlie and Ben Benjamin Herrenschmidt. Signed-off-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NDave Airlie <airlied@linux.ie>
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由 David Miller 提交于
The address needs to be a GART relative address, rather than a PCI DMA address. Signed-off-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NDave Airlie <airlied@linux.ie>
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由 David Miller 提交于
The memory behind ring_rptr can either be in ioremapped memory or a vmalloc() normal kernel memory buffer. However, the code unconditionally uses DRM_{READ,WRITE}32() (and thus readl() and writel()) to access it. Basically, if RADEON_IS_AGP then it's ioremap()'d memory else it's vmalloc'd memory. Adjust all of the ring_rptr access code as needed. While we're here, kill the 'scratch' pointer in drm_radeon_private. It's only used in the one place where it is initialized. Signed-off-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NDave Airlie <airlied@linux.ie>
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由 Benjamin Herrenschmidt 提交于
This changes drm_local_map to use a resource_size for its "offset" member instead of an unsigned long, thus allowing 32-bit machines with a >32-bit physical address space to be able to store there their register or framebuffer addresses when those are above 4G, such as when using a PCI video card on a recent AMCC 440 SoC. This patch isn't as "trivial" as it sounds: A few functions needed to have some unsigned long/int changed to resource_size_t and a few printk's had to be adjusted. But also, because userspace isn't capable of passing such offsets, I had to modify drm_find_matching_map() to ignore the offset passed in for maps of type _DRM_FRAMEBUFFER or _DRM_REGISTERS. If we ever support multiple _DRM_FRAMEBUFFER or _DRM_REGISTERS maps for a given device, we might have to change that trick, but I don't think that happens on any current driver. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NDave Airlie <airlied@linux.ie>
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- 20 2月, 2009 1 次提交
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由 etienne 提交于
This fixes a regression reported in bug #12613. [airlied: not I tweaked the patch slightly and fixed it by etienne did all the hardwork so gets authorship] Signed-off-by: Netienne <etienne.basset@numericable.fr> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 08 2月, 2009 1 次提交
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由 Dave Airlie 提交于
this solves a regression from http://bugzilla.kernel.org/show_bug.cgi?id=12441Reported-by: NDaniel Vetter <daniel@ffwll.ch> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 29 12月, 2008 3 次提交
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由 Dave Airlie 提交于
this exports the locked version of the symbol as struct_mutex locks it all. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
This is step one towards having multiple masters sharing a drm device in order to get fast-user-switching to work. It splits out the information associated with the drm master into a separate kref counted structure, and allocates this when a master opens the device node. It also allows the current master to abdicate (say while VT switched), and a new master to take over the hardware. It moves the Intel and radeon drivers to using the sarea from within the new master structures. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 25 11月, 2008 1 次提交
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由 Keith Packard 提交于
drm vblank initialization keeps track of the changes in driver-supplied frame counts across vt switch and mode setting, but only if you let it by not tearing down the drm vblank structure. Signed-off-by: NKeith Packard <keithp@keithp.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 11 11月, 2008 1 次提交
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由 Dave Airlie 提交于
Now that the radeon driver has suspend/resume functions, it needs to map its registers at load time or it will likely crash if a suspend operation occurs before the driver has been initialized. This patch moves the register mapping code from firstopen to load and makes the mapping into a _DRM_DRIVER one so that the core won't remove it at lastclose time. Fixes (at least partially) kernel bz #11891. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NDave Airlie <airlied@linux.ie>
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- 28 10月, 2008 1 次提交
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由 Alex Deucher 提交于
rs400/480 are like previous chips not like rs6xx chips. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 18 10月, 2008 3 次提交
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由 Alex Deucher 提交于
Someone noticed these registers moved around for later chips, so we redo the codepaths per-chip. PCIE chips don't appear to require explicit enables. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
This adds support for the RS400 family of IGPs for Intel CPUs. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
This adds support for the HS2100 IGP chipset. Signed-off-by: NDave Airlie <airlied@redhat.com>
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