1. 01 11月, 2019 23 次提交
  2. 31 10月, 2019 11 次提交
  3. 30 10月, 2019 6 次提交
    • I
      drm/i915: Avoid HPD poll detect triggering a new detect cycle · a8ddac7c
      Imre Deak 提交于
      For the HPD interrupt functionality the HW depends on power wells in the
      display core domain to be on. Accordingly when enabling these power
      wells the HPD polling logic will force an HPD detection cycle to account
      for hotplug events that may have happened when such a power well was
      off.
      
      Thus a detect cycle started by polling could start a new detect cycle if
      a power well in the display core domain gets enabled during detect and
      stays enabled after detect completes. That in turn can lead to a
      detection cycle runaway.
      
      To prevent re-triggering a poll-detect cycle make sure we drop all power
      references we acquired during detect synchronously by the end of detect.
      This will let the poll-detect logic continue with polling (matching the
      off state of the corresponding power wells) instead of scheduling a new
      detection cycle.
      
      Fixes: 6cfe7ec0 ("drm/i915: Remove the unneeded AUX power ref from intel_dp_detect()")
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112125Reported-and-tested-by: NVal Kulkov <val.kulkov@gmail.com>
      Reported-and-tested-by: Nwangqr <wqr.prg@gmail.com>
      Cc: Val Kulkov <val.kulkov@gmail.com>
      Cc: wangqr <wqr.prg@gmail.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191028181517.22602-1-imre.deak@intel.com
      a8ddac7c
    • C
      drm/i915/gt: Always track callers to intel_rps_mark_interactive() · a06375a9
      Chris Wilson 提交于
      During startup, we may find ourselves in an interesting position where
      we haven't fully enabled RPS before the display starts trying to use it.
      This may lead to an imbalance in our "interactive" counter:
      
      <3>[    4.813326] intel_rps_mark_interactive:652 GEM_BUG_ON(!rps->power.interactive)
      <4>[    4.813396] ------------[ cut here ]------------
      <2>[    4.813398] kernel BUG at drivers/gpu/drm/i915/gt/intel_rps.c:652!
      <4>[    4.813430] invalid opcode: 0000 [#1] PREEMPT SMP PTI
      <4>[    4.813438] CPU: 1 PID: 18 Comm: kworker/1:0H Not tainted 5.4.0-rc5-CI-CI_DRM_7209+ #1
      <4>[    4.813447] Hardware name:  /NUC7i5BNB, BIOS BNKBL357.86A.0054.2017.1025.1822 10/25/2017
      <4>[    4.813525] Workqueue: events_highpri intel_atomic_cleanup_work [i915]
      <4>[    4.813589] RIP: 0010:intel_rps_mark_interactive+0xb3/0xc0 [i915]
      <4>[    4.813597] Code: bc 3f de e0 48 8b 35 84 2e 24 00 49 c7 c0 f3 d4 4e a0 b9 8c 02 00 00 48 c7 c2 80 9c 48 a0 48 c7 c7 3e 73 34 a0 e8 8d 3b e5 e0 <0f> 0b 90 66 2e 0f 1f 84 00 00 00 00 00 80 bf c0 00 00 00 00 74 32
      <4>[    4.813616] RSP: 0018:ffffc900000efe00 EFLAGS: 00010286
      <4>[    4.813623] RAX: 000000000000000e RBX: ffff8882583cc7f0 RCX: 0000000000000000
      <4>[    4.813631] RDX: 0000000000000001 RSI: 0000000000000008 RDI: ffff888275969c00
      <4>[    4.813639] RBP: 0000000000000000 R08: 0000000000000008 R09: ffff888275ace000
      <4>[    4.813646] R10: ffffc900000efe00 R11: ffff888275969c00 R12: ffff8882583cc8d8
      <4>[    4.813654] R13: ffff888276abce00 R14: 0000000000000000 R15: ffff88825e878860
      <4>[    4.813662] FS:  0000000000000000(0000) GS:ffff888276a80000(0000) knlGS:0000000000000000
      <4>[    4.813672] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      <4>[    4.813678] CR2: 00007f051d5ca0a8 CR3: 0000000262f48001 CR4: 00000000003606e0
      <4>[    4.813686] Call Trace:
      <4>[    4.813755]  intel_cleanup_plane_fb+0x4e/0x60 [i915]
      <4>[    4.813764]  drm_atomic_helper_cleanup_planes+0x4d/0x70
      <4>[    4.813833]  intel_atomic_cleanup_work+0x15/0x80 [i915]
      <4>[    4.813842]  process_one_work+0x26a/0x620
      <4>[    4.813850]  worker_thread+0x37/0x380
      <4>[    4.813857]  ? process_one_work+0x620/0x620
      <4>[    4.813864]  kthread+0x119/0x130
      <4>[    4.813870]  ? kthread_park+0x80/0x80
      <4>[    4.813878]  ret_from_fork+0x3a/0x50
      <4>[    4.813887] Modules linked in: i915(+) mei_hdcp x86_pkg_temp_thermal coretemp crct10dif_pclmul crc32_pclmul btusb btrtl btbcm btintel snd_hda_intel snd_intel_nhlt snd_hda_codec bluetooth snd_hwdep snd_hda_core ghash_clmulni_intel snd_pcm e1000e ecdh_generic ecc ptp pps_core mei_me mei prime_numbers
      <4>[    4.813934] ---[ end trace c13289af88174ffc ]---
      
      The solution employed is to not worry about RPS state and keep the tally
      of the interactive counter separate. When we do enable RPS, we will then
      take the display activity into account.
      
      Fixes: 3e7abf81 ("drm/i915: Extract GT render power state management")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Andi Shyti <andi.shyti@intel.com>
      Acked-by: NAndi Shyti <andi.shyti@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191030103827.2413-1-chris@chris-wilson.co.uk
      a06375a9
    • M
      811bb3db
    • M
      drm/i915/tgl: Add SFC instdone to error state · e50dbdbf
      Mika Kuoppala 提交于
      On debugging media workload hangs, sfc instdone
      might prove useful in future. Be prepared.
      Signed-off-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191029163841.5224-1-mika.kuoppala@linux.intel.com
      e50dbdbf
    • L
      drm/i915/tgl: add support to one DP-MST stream · b3545e08
      Lucas De Marchi 提交于
      This is the minimum change to support 1 (and only 1) DP-MST monitor
      connected on Tiger Lake. This change was isolated from previous patch
      from José. In order to support more streams we will need to create a
      master-slave relation on the transcoders and that is not currently
      working yet.
      
      v2: remove unused macro and use REG_FIELD_PREP() (Ville)
      Signed-off-by: NLucas De Marchi <lucas.demarchi@intel.com>
      Reviewed-by: NJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191029035049.5907-1-lucas.demarchi@intel.com
      b3545e08
    • C
      drm/i915/gem: Make context persistence optional · a0e04715
      Chris Wilson 提交于
      Our existing behaviour is to allow contexts and their GPU requests to
      persist past the point of closure until the requests are complete. This
      allows clients to operate in a 'fire-and-forget' manner where they can
      setup a rendering pipeline and hand it over to the display server and
      immediately exit. As the rendering pipeline is kept alive until
      completion, the display server (or other consumer) can use the results
      in the future and present them to the user.
      
      The compute model is a little different. They have little to no buffer
      sharing between processes as their kernels tend to operate on a
      continuous stream, feeding the results back to the client application.
      These kernels operate for an indeterminate length of time, with many
      clients wishing that the kernel was always running for as long as they
      keep feeding in the data, i.e. acting like a DSP.
      
      Not all clients want this persistent "desktop" behaviour and would prefer
      that the contexts are cleaned up immediately upon closure. This ensures
      that when clients are run without hangchecking (e.g. for compute kernels
      of indeterminate runtime), any GPU hang or other unexpected workloads
      are terminated with the process and does not continue to hog resources.
      
      The default behaviour for new contexts is the legacy persistence mode,
      as some desktop applications are dependent upon the existing behaviour.
      New clients will have to opt in to immediate cleanup on context
      closure. If the hangchecking modparam is disabled, so is persistent
      context support -- all contexts will be terminated on closure.
      
      We expect this behaviour change to be welcomed by compute users, who
      have often been caught between a rock and a hard place. They disable
      hangchecking to avoid their kernels being "unfairly" declared hung, but
      have also experienced true hangs that the system was then unable to
      clean up. Naturally, this leads to bug reports.
      
      Testcase: igt/gem_ctx_persistence
      Link: https://github.com/intel/compute-runtime/pull/228Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Michał Winiarski <michal.winiarski@intel.com>
      Cc: Jon Bloomfield <jon.bloomfield@intel.com>
      Reviewed-by: NJon Bloomfield <jon.bloomfield@intel.com>
      Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Acked-by: NJason Ekstrand <jason@jlekstrand.net>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191029202338.8841-1-chris@chris-wilson.co.uk
      a0e04715