1. 13 2月, 2019 1 次提交
  2. 07 2月, 2019 3 次提交
  3. 12 12月, 2018 1 次提交
  4. 22 8月, 2018 1 次提交
  5. 10 8月, 2018 3 次提交
  6. 25 7月, 2018 2 次提交
  7. 24 7月, 2018 1 次提交
    • J
      mlxsw: spectrum: Implement chain template hinting · e2f2a1fd
      Jiri Pirko 提交于
      Since cld_flower provides information about the filter template for
      specific chain, use this information in order to prepare a region.
      Use the template to find out what elements are going to be used
      and pass that down to mlxsw_sp_acl_tcam_group_add(). Later on, when the
      first filter is inserted, the mlxsw_sp_acl_tcam_group_use_patterns()
      function would use this element usage information instead of looking
      up a pattern.
      Signed-off-by: NJiri Pirko <jiri@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e2f2a1fd
  8. 08 7月, 2018 1 次提交
  9. 10 3月, 2018 1 次提交
  10. 22 1月, 2018 1 次提交
  11. 18 1月, 2018 1 次提交
  12. 07 12月, 2017 2 次提交
  13. 27 9月, 2017 2 次提交
  14. 24 8月, 2017 2 次提交
  15. 08 8月, 2017 2 次提交
  16. 05 8月, 2017 1 次提交
  17. 18 7月, 2017 2 次提交
  18. 07 6月, 2017 1 次提交
  19. 01 6月, 2017 1 次提交
  20. 27 5月, 2017 1 次提交
    • I
      mlxsw: spectrum: Implement common FID core · a1107487
      Ido Schimmel 提交于
      The device supports three types of FIDs. 802.1Q and 802.1D FIDs for
      VLAN-aware and VLAN-unaware bridges (respectively) and rFIDs to
      transport packets to the router block.
      
      The different users (e.g., bridge, router, ACLs) of the FIDs
      infrastructure need not know about the internal FIDs implementation and
      can therefore interact with it using a restricted set of exported
      functions.
      
      By encapsulating the entire FID logic and hiding it from the rest of the
      driver we get a code base that it much simpler and easier to work with
      and extend.
      
      For example, in the current Spectrum ASIC only 802.1D FIDs can be
      assigned a VNI, but future ASICs will also support 802.1Q FIDs. With
      this patch in place, support for future ASICs can be easily added by
      implementing a new FID operations according to their capabilities.
      Signed-off-by: NIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: NJiri Pirko <jiri@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a1107487
  21. 25 5月, 2017 2 次提交
  22. 21 4月, 2017 1 次提交
  23. 23 3月, 2017 1 次提交
  24. 13 3月, 2017 1 次提交
  25. 10 3月, 2017 2 次提交
  26. 09 3月, 2017 1 次提交
  27. 11 2月, 2017 1 次提交
  28. 04 2月, 2017 1 次提交