- 13 8月, 2019 38 次提交
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由 Alex Deucher 提交于
It's large and doesn't need contiguous memory. Fixes allocation failures in some cases. v2: kvfree the memory. Reviewed-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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The SOC15_REG_OFFSET() macro wasn't used, making the soft recovery fail. v2: use WREG32_SOC15 instead of WREG32 + SOC15_REG_OFFSET Signed-off-by: NPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Follow patch below: drm/amd/powerplay: re-define smu interface version for smu v11 Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Init MC_MGCG/LS flag. Also apply to athub CG. Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Add 2 mmhub instances CG Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Follow the hw spec, and no need to consider gfxoff on Arcturus Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Missed AMD_CG_SUPPORT_GFX_CP_LS accidently when commit patch before drm/amdgpu: enable gfx clock gating for Arcturus Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
feature mask info is enough for rocm tool, "cat /sys/class/drm/card0/device/ras/features" will get the info like this: feature mask: 0x3ffb Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kenneth Feng 提交于
change the smu_read_sensor sequence to: asic specific sensor read -> smu v11 specific sensor read -> smu v11 common sensor read Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Untie the bind of get/set athub CG state from mmhub, for cosmetic fix and Asic not using mmhub 1.0. Besides, also fix wrong athub CG state in amdgpu_pm_info. Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Init sdma MGCG/LS flag Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Add ARCTURUS case in sdma set clockgating function Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Shorten the code with RREG32_SDMA/WREG32_SDMA macro in CG part. Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Init hdp MGCG/LS flag as Vega20 Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Add hdp CGLS for Arcturus in set common clockgating function Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Init gfx MGCG/LS and CGCG/LS flag. Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Le Ma 提交于
Add ARCTURUS case in gfx set clockgating function. No 3d clock on Arcturus. Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
enable mmhub ras feature and create sysfs/debugfs node for mmhub Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
call mmhub ras query/inject in amdgpu ras Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
add amdgpu_mmhub_funcs definition and initialize it, prepare for mmhub ras enablement Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Tao Zhou 提交于
ras sub block index could be passed from shell command Signed-off-by: NTao Zhou <tao.zhou1@amd.com> Reviewed-by: NGuchun Chen <guchun.chen@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Guchun Chen 提交于
Sub_block_index can be passed from user level, so add one check before accessing the array first to prevent array index out of bound problem. Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Reviewed-by: NTao Zhou <tao.zhou1@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 tiancyin 提交于
update the smu11_driver_if_navi10.h since navi14 smu fw update to 53.12 Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: Ntiancyin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 tiancyin 提交于
[why] navi14 share same defination of smu interface version with navi10, anyone of them update the version may break the other one's version checking. [how] create different version defination, so that they can update their version separately. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ntiancyin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Add the navi14 PCI device id. Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Michel Dänzer 提交于
DC already handles this correctly since amdgpu minor version 31. Bump the minor version again so that xf86-video-amdgpu can take advantage of this working without DC as well now. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 David Francis 提交于
This file was accidentally added to the driver during Navi promotion Nothing includes it. No makefile attempts to compile it, and it would fail compilation if they tried Remove it Signed-off-by: NDavid Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com>w Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
enables vcn medium grained clock gating Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
enables athub medium grained clock gating and memory light sleep Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
add navi12 define Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
enables ih clock gating Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
enables mmhub medium grained clock gating and memory light sleep Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
add navi12 define Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
enables sdma medium grained clock gating and memory light sleep Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
add navi12 define Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
enables hdp medium grained clock gating and memory light sleep Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Xiaojie Yuan 提交于
enables following gfx clock gating features: - medium grained clock gating - medium grained light sleep - coarse grained clock gating - cp memory light sleep - rlc memory light sleep CGLS (Coarse Grained Light Sleep) will break s3, so don't enable it. Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Marek Olšák 提交于
This reverts commit 9ed2c993. SET_CONFIG_REG writes to memory if register shadowing is enabled, causing a VM fault. NGG streamout is unstable anyway, so all UMDs should use legacy streamout. I think Mesa is the only driver using NGG streamout. Signed-off-by: NMarek Olšák <marek.olsak@amd.com> Reviewed-by: NLe Ma <Le.Ma@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 8月, 2019 1 次提交
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git://people.freedesktop.org/~agd5f/linux由 Dave Airlie 提交于
drm-next-5.4-2019-08-09: Same as drm-next-5.4-2019-08-06, but with the readq/writeq stuff fixed and 5.3-rc3 backmerged. amdgpu: - Add navi14 support - Add navi12 support - Add Arcturus support - Enable mclk DPM for Navi - Misc DC display fixes - Add perfmon support for DF - Add scatter/gather display support for Raven - Improve SMU handling for GPU reset - RAS support for GFX - Drop last of drmP.h - Add support for wiping memory on buffer release - Allow cursor async updates for fb swaps - Misc fixes and cleanups amdkfd: - Add navi14 support - Add navi12 support - Add Arcturus support - CWSR trap handlers updates for gfx9, 10 - Drop last of drmP.h - Update MAINTAINERS radeon: - Misc fixes and cleanups - Make kexec more reliable by tearing down the GPU ttm: - Add release_notify callback uapi: - Add wipe memory on release flag for buffer creation Signed-off-by: NDave Airlie <airlied@redhat.com> [airlied: resolved conflicts with ttm resv moving] From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190809184807.3381-1-alexander.deucher@amd.com
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- 10 8月, 2019 1 次提交
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由 Alex Deucher 提交于
Linux 5.3-rc3 Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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