1. 12 6月, 2015 3 次提交
  2. 30 5月, 2015 1 次提交
  3. 29 5月, 2015 5 次提交
  4. 28 5月, 2015 3 次提交
  5. 22 5月, 2015 4 次提交
    • C
      drm/i915/skl: don't fail colorkey + scaler request · 225c228a
      Chandra Konduru 提交于
      There is a mplayer video failure reported with xv.
      This is because there is a request to do both plane scaling
      and colorkey. Because skl hw doesn't support plane scaling
      and colorkey at the same time, request is failed which is expected
      behavior.
      
      To make xv operate, this patch allows colorkey continue to work
      without using scaler. Then behavior would be similar to platforms
      without plane scaler support.
      Signed-off-by: NChandra Konduru <chandra.konduru@intel.com>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90449
      [danvet: change can_scale to bool as requested by Ville.]
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      225c228a
    • V
      drm/i915: Disable FDI RX/TX before the ports · 5a74f70a
      Ville Syrjälä 提交于
      Bspec says we should disable the FDI RX/TX before disabling the PCH
      ports. Do so.
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      5a74f70a
    • V
      drm/i915: Fix DP enhanced framing for CPT · e3ef4479
      Ville Syrjälä 提交于
      Currently we're always enabling enhanced framing on CPT even if the sink
      doesn't support it. Fix this up by actaully looking at what the sink
      tells us.
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      e3ef4479
    • D
      drm/i915/skl: Deinit/init the display at suspend/resume · 5d96d8af
      Damien Lespiau 提交于
      We need to re-init the display hardware when going out of suspend. This
      includes:
      
        - Hooking the PCH to the reset logic
        - Restoring CDCDLK
        - Enabling the DDB power
      
      Among those, only the CDCDLK one is a bit tricky. There's some
      complexity in that:
      
        - DPLL0 (which is the source for CDCLK) has two VCOs, each with a set
          of supported frequencies. As eDP also uses DPLL0 for its link rate,
          once DPLL0 is on, we restrict the possible eDP link rates the chosen
          VCO.
        - CDCLK also limits the bandwidth available to push pixels.
      
      So, as a first step, this commit restore what the BIOS set, until I can
      do more testing.
      
      In case that's of interest for the reviewer, I've unit tested the
      function that derives the decimal frequency field:
      
        #include <stdio.h>
        #include <stdint.h>
        #include <assert.h>
      
        #define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
      
        static const struct dpll_freq {
                unsigned int freq;
                unsigned int decimal;
        } freqs[] = {
                { .freq = 308570, .decimal = 0b01001100111},
                { .freq = 337500, .decimal = 0b01010100001},
                { .freq = 432000, .decimal = 0b01101011110},
                { .freq = 450000, .decimal = 0b01110000010},
                { .freq = 540000, .decimal = 0b10000110110},
                { .freq = 617140, .decimal = 0b10011010000},
                { .freq = 675000, .decimal = 0b10101000100},
        };
      
        static void intbits(unsigned int v)
        {
                int i;
      
                for(i = 10; i >= 0; i--)
                        putchar('0' + ((v >> i) & 1));
        }
      
        static unsigned int freq_decimal(unsigned int freq /* in kHz */)
        {
                return (freq - 1000) / 500;
        }
      
        static void test_freq(const struct dpll_freq *entry)
        {
                unsigned int decimal = freq_decimal(entry->freq);
      
                printf("freq: %d, expected: ", entry->freq);
                intbits(entry->decimal);
                printf(", got: ");
                intbits(decimal);
                putchar('\n');
      
                assert(decimal == entry->decimal);
        }
      
        int main(int argc, char **argv)
        {
                int i;
      
                for (i = 0; i < ARRAY_SIZE(freqs); i++)
                        test_freq(&freqs[i]);
      
                return 0;
        }
      
      v2:
        - Rebase on top of -nightly
        - Use (freq - 1000) / 500 for the decimal frequency (Ville)
        - Fix setting the enable bit of HSW_NDE_RSTWRN_OPT (Ville)
        - Rename skl_display_{resume,suspend} to skl_{init,uninit}_cdclk to
          be consistent with the BXT code (Ville)
        - Store boot CDCLK in ddi_pll_init (Ville)
        - Merge dev_priv's skl_boot_cdclk into cdclk_freq
        - Use LCPLL_PLL_LOCK instead of (1 << 30) (Ville)
        - Replace various '0' by SKL_DPLL0 to be a bit more explicit that
          we're programming DPLL0
        - Busy poll the PCU before doing the frequency change. It takes about
          3/4 cycles, each separated by 10us, to get the ACK from the CPU
          (Ville)
      
      v3:
        - Restore dev_priv->skl_boot_cdclk, leaving unification with
          dev_priv->cdclk_freq for a later patch (Daniel, Ville)
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDamien Lespiau <damien.lespiau@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      5d96d8af
  6. 21 5月, 2015 3 次提交
    • C
      drm/i915: Limit mmio flip RPS boosts · bcafc4e3
      Chris Wilson 提交于
      Since we will often pageflip to an active surface, we will often have to
      wait for the surface to be written before issuing the flip. Also we are
      likely to wait on that surface in plenty of time before the vblank.
      Since we have a mechanism for boosting when a flip misses the expected
      vblank, curtain the number of times we RPS boost when simply waiting for
      mmioflip.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      [danvet: s/rq/req/]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bcafc4e3
    • C
      drm/i915: Implement inter-engine read-read optimisations · b4716185
      Chris Wilson 提交于
      Currently, we only track the last request globally across all engines.
      This prevents us from issuing concurrent read requests on e.g. the RCS
      and BCS engines (or more likely the render and media engines). Without
      semaphores, we incur costly stalls as we synchronise between rings -
      greatly impacting the current performance of Broadwell versus Haswell in
      certain workloads (like video decode). With the introduction of
      reference counted requests, it is much easier to track the last request
      per ring, as well as the last global write request so that we can
      optimise inter-engine read read requests (as well as better optimise
      certain CPU waits).
      
      v2: Fix inverted readonly condition for nonblocking waits.
      v3: Handle non-continguous engine array after waits
      v4: Rebase, tidy, rewrite ring list debugging
      v5: Use obj->active as a bitfield, it looks cool
      v6: Micro-optimise, mostly involving moving code around
      v7: Fix retire-requests-upto for execlists (and multiple rq->ringbuf)
      v8: Rebase
      v9: Refactor i915_gem_object_sync() to allow the compiler to better
      optimise it.
      
      Benchmark: igt/gem_read_read_speed
      hsw:gt3e (with semaphores):
      Before: Time to read-read 1024k:		275.794µs
      After:  Time to read-read 1024k:		123.260µs
      
      hsw:gt3e (w/o semaphores):
      Before: Time to read-read 1024k:		230.433µs
      After:  Time to read-read 1024k:		124.593µs
      
      bdw-u (w/o semaphores):             Before          After
      Time to read-read 1x1:            26.274µs       10.350µs
      Time to read-read 128x128:        40.097µs       21.366µs
      Time to read-read 256x256:        77.087µs       42.608µs
      Time to read-read 512x512:       281.999µs      181.155µs
      Time to read-read 1024x1024:    1196.141µs     1118.223µs
      Time to read-read 2048x2048:    5639.072µs     5225.837µs
      Time to read-read 4096x4096:   22401.662µs    21137.067µs
      Time to read-read 8192x8192:   89617.735µs    85637.681µs
      
      Testcase: igt/gem_concurrent_blit (read-read and friends)
      Cc: Lionel Landwerlin <lionel.g.landwerlin@linux.intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> [v8]
      [danvet: s/\<rq\>/req/g]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b4716185
    • D
      drm/i915: s/\<rq\>/req/g · eed29a5b
      Daniel Vetter 提交于
      The merged seqno->request conversion from John called request
      variables req, but some (not all) of Chris' recent patches changed
      those to just rq. We've had a lenghty (and inconclusive) discussion on
      irc which is the more meaningful name with maybe at most a slight bias
      towards req.
      
      Given that the "don't change names without good reason to avoid
      conflicts" rule applies, so lets go back to a req everywhere for
      consistency. I'll sed any patches for which this will cause conflicts
      before applying.
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: John Harrison <John.C.Harrison@Intel.com>
      [danvet: s/origina/merged/ as pointed out by Chris - the first
      mass-conversion patch was from Chris, the merged one from John.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      eed29a5b
  7. 20 5月, 2015 21 次提交