- 01 4月, 2013 7 次提交
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由 Paul Bolle 提交于
Commit 90173882 ("omap: add dsp platform device") used CONFIG_BRIDGE_DVFS were it obviously meant CONFIG_TIDSPBRIDGE_DVFS. Fix that. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Bolle 提交于
The Kconfig symbol MACH_OMAP_HTCWIZARD got added in v2.6.30. It has never been used. Its entry can safely be removed. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Rajendra Nayak 提交于
omap3_noncore_dpll_set_rate() attempts an enable of bypass clk as well as ref clk for every .set_rate attempt on a noncore DPLL, regardless of whether the .set_rate results in the DPLL being locked or put in bypass. Early at boot, while some of these DPLLs are programmed and locked (using .set_rate for the DPLL), this causes an ordering issue. For instance, on OMAP5, the USB DPLL derives its bypass clk from ABE DPLL. If a .set_rate of USB DPLL which programmes the M,N and locks it is called before the one for ABE, the enable of USB bypass clk (derived from ABE DPLL) then attempts to lock the ABE DPLL and fails as the M,N values for ABE are yet to be programmed. To get rid of this ordering needs, enable bypass clk for a DPLL as part of its .set_rate only when its being put in bypass, and only enable the ref clk when its locked. Reported-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
_pwrdm_save_clkdm_state_and_activate() tried to test one of its unsigned arguments to determine whether it was less than zero. Fix by moving the error test to the caller. Reported-by: NChen Gang <gang.chen@asianux.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Rajendra Nayak 提交于
_HWMOD_WAKEUP_ENABLED is currently unused across the hwmod framework. Just get rid of it, so we have one less flag to worry about. Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Vaibhav Hiremath 提交于
WDT1 module can take one of the below clocks as input functional clock - - On-Chip 32K RC Osc [default/reset] - 32K from PRCM The On-Chip 32K RC Osc clock is not an accurate clock-source as per the design/spec, so as a result, for example, timer which supposed to get expired @60Sec, but will expire somewhere ~@40Sec, which is not expected by any use-case. The solution here is to switch the input clock-source to PRCM generated 32K clock-source during boot-time itself. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <benoit.cousson@linaro.org> Cc: Paul Walmsley <paul@pwsan.com>
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由 Vaibhav Hiremath 提交于
This patch adds sysc definitions to the wdt1 hwmod entry, which in-turn makes sure that sysc idle bit-fields are configured to valid state on enable/disable callbacks. With the recent submitted patch from Santosh Shilimkar, "ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc" (commit: 4a98c2d89), it is required to add sysconf information to each valid hwmod entry, else device will not be come out from idle state properly and leads to below kernel crash - [2.190237] Unhandled fault: external abort on non-linefetch (0x1028) at 0xf9e35034 [2.198325] Internal error: : 1028 [#1] SMP ARM [2.203101] Modules linked in: [2.206334] CPU: 0 Not tainted (3.9.0-rc3-00059-gd114294#1) [2.212679] PC is at omap_wdt_disable.clone.5+0xc/0x60 [2.218090] LR is at omap_wdt_probe+0x184/0x1fc Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <benoit.cousson@linaro.org> Cc: Paul Walmsley <paul@pwsan.com>
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- 23 3月, 2013 1 次提交
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由 Laxman Dewangan 提交于
Fix typo on register address of slink3 controller where register address is wrongly set as 0x7000d480 but it is 0x7000d800. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Cc: <stable@vger.kernel.org> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 21 3月, 2013 1 次提交
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由 Paul Bolle 提交于
There's a (rather subtle) typo in "CONFIG_SMC91x_MODULE". Fix it once and for all by using IS_ENABLED(), which is designed to avoid issues like this. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 19 3月, 2013 10 次提交
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由 Rajendra Nayak 提交于
OMAP5 does not have freqsel either, so checks needs to be extended. Infact only OMAP343X devices has the freqsel support, so fix the check accordingly so that future patching can be avoided. Reported-by: NArchit Taneja <archit@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
Errata i688 is also applicable for OMAP5 based devices. Update the code so that it can be enabled on OMAP5 devices. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
On OMAP5 es2 WakeupGen SAR register layout offset have changed. Update the layout accordingly. Reported-by: NMenon, Nishanth <nm@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
Update SAR RAM base address for OMAP5 based devices. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Tero Kristo 提交于
Make use of 'prm_base' so that prm read_inst/write_inst can work on OMAP5 devices. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
Allow prm init to succeed on OMAP5 SOCs. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
OMAP5 clockdata has different sys clock node name. Fix the timer code to take care of it. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
Update OMAP5 ES2 idcode and make ES2 as default detection. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Shawn Guo 提交于
While adding i.MX DEBUG_LL selection, commit f8c95fe6 (ARM: imx: support DEBUG_LL uart port selection for all i.MX SoCs) leaves Kconfig symbol DEBUG_IMX_UART_PORT there without any dependency check. This results in that everyone gets the symbol in their config, which is someting undesirable. Add "depends on ARCH_MXC" for the symbol to prevent that. Reported-by: NKarl Beldan <karl.beldan@gmail.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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由 Marek Vasut 提交于
The issue fixed by this patch manifests only then using X11 with mxsfb driver. The X11 will display either shifted image or otherwise distorted image on the LCD. The problem is that the X11 tries to reconfigure the framebuffer and along the way calls fb_ops.fb_set_par() with X11's desired configuration values. The field of particular interest is fb_info->var.sync which contains non-standard values if configured by kernel. These are either FB_SYNC_DATA_ENABLE_HIGH_ACT, FB_SYNC_DOTCLK_FAILING_ACT or both, depending on the platform configuration. Both of these values are defined in the include/linux/mxsfb.h file. The driver interprets these values and configures the LCD controller accordingly. Yet X11 only has access to the standard values for this field defined in include/uapi/linux/fb.h and thus, unlike kernel, omits these special values. This results in distorted image on the LCD. This patch moves these non-standard values into new field of the mxsfb_platform_data structure so the driver can in turn check this field instead of the video mode field for these specific portions. Moreover, this patch prefixes these values with MXSFB_SYNC_ prefix instead of FB_SYNC_ prefix to prevent confusion of subsequent users. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Linux ARM <linux-arm-kernel@lists.infradead.org> Cc: Linux FBDEV <linux-fbdev@vger.kernel.org> Cc: Lothar Waßmann <LW@karo-electronics.de> Cc: Sascha Hauer <kernel@pengutronix.de> Tested-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 18 3月, 2013 1 次提交
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由 Arnd Bergmann 提交于
887cbce0 "arch Kconfig: centralise CONFIG_ARCH_NO_VIRT_TO_BUS" and 4febd95a "Select VIRT_TO_BUS directly where needed" from Stephen Rothwell changed globally how CONFIG_VIRT_TO_BUS is selected, while my own a5d533ee "ARM: disable virt_to_bus/ virt_to_bus almost everywhere" was merged at the same time and changed which platforms select it on ARM. The result of this conflict was that we again see CONFIG_VIRT_TO_BUS on all ARM systems. This patch fixes up the problem and removes CONFIG_ARCH_NO_VIRT_TO_BUS again on ARM. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Stephen Rothwell <sfr@canb.auug.org.au>
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- 16 3月, 2013 1 次提交
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由 Santosh Shilimkar 提交于
With recent arm broadcast time clean-up from Mark Rutland, the dummy broadcast device is always registered with timer subsystem. And since the rating of the dummy clock event is very high, it may be preferred over a real clock event. This is a change in behavior from past and not an intended one. So reduce the rating of the dummy clock-event so that real clock-event device is selected when available. Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 3月, 2013 4 次提交
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由 Sascha Hauer 提交于
The i.MX35 has two bits per clock gate which are decoded as follows: 0b00 -> clock off 0b01 -> clock is on in run mode, off in wait/doze 0b10 -> clock is on in run/wait mode, off in doze 0b11 -> clock is always on The reset value for the MAX clock is 0b10. The MAX clock is needed by the SoC, yet unused in the Kernel, so the common clock framework will disable it during late init time. It will only disable clocks though which it detects as being turned on. This detection is made depending on the lower bit of the gate. If the reset value has been altered by the bootloader to 0b11 the clock framework will detect the clock as turned on, yet unused, hence it will turn it off and the system locks up. This patch turns the MAX clock on unconditionally making the Kernel independent of the bootloader. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Stephen Boyd 提交于
Scorpion processors have always been v7 CPUs. Fix the Kconfig text to reflect this. Reported-by: NStepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Haojian Zhuang 提交于
arch/arm/mach-mmp/gplugd.c: In function ‘gplugd_init’: arch/arm/mach-mmp/gplugd.c:188:2: error: implicit declaration of function ‘platform_device_register’ [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[1]: *** [arch/arm/mach-mmp/gplugd.o] Error 1 make: *** [arch/arm/mach-mmp] Error 2 So append platform_device.h to resolve build issue. Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
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由 Arnd Bergmann 提交于
56bc911a "[media] s5p-fimc: Redefine platform data structure for fimc-is" changed the bus_type member of struct fimc_source_info treewide, but got one instance wrong in mach-s5pv210, which was evidently not even build tested. This adds the missing change to get s5pv210_defconfig to build again. Applies on the Mauro's media tree. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
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- 14 3月, 2013 5 次提交
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由 Sascha Hauer 提交于
The i.MX25 DT machine descriptor calls a non existing imx25_timer_init() function. This patch adds it to fix compilation. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Ludovic Desroches 提交于
Fix an infinite loop when suspending or resuming a device with AIC5. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Ludovic Desroches 提交于
gpio suspend/resume and wakeup sources where not managed when using pinctrl so it was impossible to wake up the system with a gpio. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Marek Szyprowski 提交于
Atomic pool should always be allocated from DMA zone if such zone is available in the system to avoid issues caused by limited dma mask of any of the devices used for making an atomic allocation. Reported-by: NKrzysztof Halasa <khc@pm.waw.pl> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Cc: Stable <stable@vger.kernel.org> [v3.6+]
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由 Russell King 提交于
Consistently check errors using the usual method used in the kernel for much of its history. For instance: int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) { int div; div = gpmc_calc_divider(t->sync_clk); if (div < 0) return div; static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) { ... return gpmc_cs_set_timings(cs, t); ..... ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); if (IS_ERR_VALUE(ret)) return ret; So, gpmc_cs_set_timings() thinks any negative return value is an error, but where we check that in higher levels, only a limited range are errors... There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really appropriate, and that is in arch/arm/include/asm/syscall.h: static inline long syscall_get_error(struct task_struct *task, struct pt_regs *regs) { unsigned long error = regs->ARM_r0; return IS_ERR_VALUE(error) ? error : 0; } because this function really does have to differentiate between error return values and addresses which look like negative numbers (eg, from mmap()). So, here's a patch to remove them from OMAP, except for the above. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 3月, 2013 4 次提交
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由 Richard Genoud 提交于
There was only chip enable and readdy/busy pins for the nand controller. This add the rest of the pins. pinctrl_nand_16bits contains the specific muxes for 16 bits NANDs. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Richard Genoud 提交于
Comments on NAND pins where inverted. Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Johan Hovold 提交于
Fix regression introduced by commit d2323cf7 ("onewire: w1-gpio: add ext_pullup_enable pin in platform data") which added a gpio entry to the platform data, but did not add the required initialisers to the board files using it. Consequently, the driver would request gpio 0 at probe, which could break other uses of the corresponding pin. On AT91 requesting gpio 0 changes the pin muxing for PIOA0, which, for instance, breaks SPI0 on at91sam9g20. Cc: stable <stable@vger.kernel.org> Signed-off-by: NJohan Hovold <jhovold@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Stephen Rothwell 提交于
In commit 887cbce0 ("arch Kconfig: centralise ARCH_NO_VIRT_TO_BUS") I introduced the config sybmol HAVE_VIRT_TO_BUS and selected that where needed. I am not sure what I was thinking. Instead, just directly select VIRT_TO_BUS where it is needed. Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 12 3月, 2013 6 次提交
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由 Chen Gang 提交于
k is u32 which never < 0, need type cast, or cause issue. Signed-off-by: NChen Gang <gang.chen@asianux.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NMircea Gherzan <mgherzan@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nicolas Pitre 提交于
Commit 455bd4c4 ("ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) optimizations") attempted to fix a compliance issue with the memset return value. However the memset itself became broken by that patch for misaligned pointers. This fixes the above by branching over the entry code from the misaligned fixup code to avoid reloading the original pointer. Also, because the function entry alignment is wrong in the Thumb mode compilation, that fixup code is moved to the end. While at it, the entry instructions are slightly reworked to help dual issue pipelines. Signed-off-by: NNicolas Pitre <nico@linaro.org> Tested-by: NAlexander Holler <holler@ahsoftware.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Matt Porter 提交于
This adds additional error checking to the private edma api implementation to catch the case where the edma_alloc_slot() has an invalid controller parameter. The edma dmaengine wrapper driver relies on this condition being handled in order to avoid setting up a second edma dmaengine instance on DA830. Verfied using a DA850 with the second EDMA controller platform instance removed to simulate a DA830 which only has a single EDMA controller. Reported-by: NTomas Novotny <tomas@novotny.cz> Signed-off-by: NMatt Porter <mporter@ti.com> Cc: stable@vger.kernel.org # v3.7.x+ Tested-by: NTomas Novotny <tomas@novotny.cz> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Arnd Bergmann 提交于
The definitions have move around recently, causing build errors in spear3xx for all configurations: spear3xx.c:47:5: error: 'PL080_BSIZE_16' undeclared here (not in a function) spear3xx.c:47:23: error: 'PL080_CONTROL_SB_SIZE_SHIFT' undeclared here (not in a function) spear3xx.c:48:22: error: 'PL080_CONTROL_DB_SIZE_SHIFT' undeclared here (not in a function) Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Alessandro Rubini <rubini@gnudd.com> Cc: Viresh Kumar <viresh.kumar@linaro.org>
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由 Arnd Bergmann 提交于
The ab8500 device is a child of the prcmu device, which is a memory mapped bus device, whose children are addressable using physical memory addresses, not using mailboxes, so a mailbox number in the ab8500 node cannot be parsed by DT. Nothing uses this number, since it was only introduced as part of the failed attempt to clean up prcmu mailbox handling, and we can simply remove it. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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由 Padmavathi Venna 提交于
This patch adds #dma-cells property to PL330 DMA controller nodes for supporting generic dma dt bindings on SOCFPGA platform. #dma-channels and #dma-requests are not required now but added in advance. Signed-off-by: NPadmavathi Venna <padma.v@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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