1. 18 1月, 2010 2 次提交
    • P
      sh: Need IRQs enabled for init_fpu(). · 4291b730
      Paul Mundt 提交于
      This tosses in a local_irq_enable()/disable() pair around the init_fpu()
      callsite in the FPU state restore exception handler. Fixes up a slab BUG
      triggered by making a slab cache allocation that can sleep whilst
      irqs_disabled(). This follows the behaviour undertaken by the x86
      implementation.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      4291b730
    • M
      sh: Setup early PMB mappings. · 3d467676
      Matt Fleming 提交于
      More and more boards are going to start shipping that boot with the MMU
      in 32BIT mode by default. Previously we relied on the bootloader to
      setup PMB mappings for use by the kernel but we also need to cater for
      boards whose bootloaders don't set them up.
      
      If CONFIG_PMB_LEGACY is not enabled we have full control over our PMB
      mappings and can compress our address space. Usually, the distance
      between the the cached and uncached mappings of RAM is always 512MB,
      however we can compress the distance to be the amount of RAM on the
      board.
      
      pmb_init() now becomes much simpler. It no longer has to calculate any
      mappings, it just has to synchronise the software PMB table with the
      hardware.
      
      Tested on SDK7786 and SH7785LCR.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      3d467676
  2. 15 1月, 2010 8 次提交
  3. 14 1月, 2010 1 次提交
  4. 13 1月, 2010 11 次提交
    • P
      sh: Rename split-level pgtable headers. · e44d6c40
      Paul Mundt 提交于
      These were originally named _nopmd and _pmd to follow their asm-generic
      counterparts, but we rename them to -2level and -3level for general
      consistency.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      e44d6c40
    • P
      sh: default to extended TLB support. · 782bb5a5
      Paul Mundt 提交于
      All SH-X2 and SH-X3 parts support an extended TLB mode, which has been
      left as experimental since support was originally merged. Now that it's
      had some time to stabilize and get some exposure to various platforms,
      we can drop it as an option and default enable it across the board.
      
      This is also good future proofing for newer parts that will drop support
      for the legacy TLB mode completely.
      
      This will also force 3-level page tables for all newer parts, which is
      necessary both for the varying page sizes and larger memories.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      782bb5a5
    • P
      sh: Make all PxSEGADDR() calls fatal for non-legacy configs. · 206582c3
      Paul Mundt 提交于
      This stubs out all of the PxSEGADDR() wrappers for non-legacy code.
      29-bit will continue to work with these, while 32-bit code will now blow
      up on compile rather than at runtime.
      
      The vast majority of the in-tree offenders are gone, with the only
      remaining culprits being unable to support 32-bit mode.
      
      Hopefully this will prevent anyone from ever using these again.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      206582c3
    • P
      sh: Fix up L2 cache comment typo. · 88f73d22
      Paul Mundt 提交于
      Valid sizes include 256kB, not 258kB.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      88f73d22
    • P
      sh: fixed PMB mode refactoring. · a0ab3668
      Paul Mundt 提交于
      This introduces some much overdue chainsawing of the fixed PMB support.
      fixed PMB was introduced initially to work around the fact that dynamic
      PMB mode was relatively broken, though they were never intended to
      converge. The main areas where there are differences are whether the
      system is booted in 29-bit mode or 32-bit mode, and whether legacy
      mappings are to be preserved. Any system booting in true 32-bit mode will
      not care about legacy mappings, so these are roughly decoupled.
      
      Regardless of the entry point, PMB and 32BIT are directly related as far
      as the kernel is concerned, so we also switch back to having one select
      the other.
      
      With legacy mappings iterated through and applied in the initialization
      path it's now possible to finally merge the two implementations and
      permit dynamic remapping overtop of remaining entries regardless of
      whether boot mappings are crafted by hand or inherited from the boot
      loader.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      a0ab3668
    • M
      sh: PVR detection for 2nd cut SH7786. · 7f33306e
      Matt Fleming 提交于
      The mass produced cuts use an updated PVR value, add them to the list.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      7f33306e
    • P
      sh: Add a vmlinux.bin target. · eca50f14
      Paul Mundt 提交于
      This makes vmlinux.bin generation an explicit make target, as opposed to
      just a dependency for some of the other targets.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      eca50f14
    • P
      sh: Add support for LZO-compressed kernels. · c7b16efb
      Paul Mundt 提交于
      Plugs in LZO along with the others.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      c7b16efb
    • P
    • M
      sh: Don't perform an icbi on a P2 address · 6430a598
      Matt Fleming 提交于
      The legacy P2 area may not always be mapped (for example when using
      PMB). So perform an icbi on an address that we know will always be
      mapped.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      6430a598
    • P
      sh: Move over to dynamically allocated FPU context. · 0ea820cf
      Paul Mundt 提交于
      This follows the x86 xstate changes and implements a task_xstate slab
      cache that is dynamically sized to match one of hard FP/soft FP/FPU-less.
      
      This also tidies up and consolidates some of the SH-2A/SH-4 FPU
      fragmentation. Now fpu state restorers are commonly defined, with the
      init_fpu()/fpu_init() mess reworked to follow the x86 convention.
      The fpu_init() register initialization has been replaced by xstate setup
      followed by writing out to hardware via the standard restore path.
      
      As init_fpu() now performs a slab allocation a secondary lighterweight
      restorer is also introduced for the context switch.
      
      In the future the DSP state will be rolled in here, too.
      
      More work remains for math emulation and the SH-5 FPU, which presently
      uses its own special (UP-only) interfaces.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0ea820cf
  5. 12 1月, 2010 18 次提交