1. 11 6月, 2009 5 次提交
  2. 09 6月, 2009 23 次提交
  3. 05 6月, 2009 2 次提交
  4. 04 6月, 2009 2 次提交
  5. 03 6月, 2009 2 次提交
    • F
      MX35: Add basic support for MX35PDK board · aefa1c6e
      Fabio Estevam 提交于
      Add basic support for MX35PDK board (www.freescale.com/imx35pdk).
      Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      aefa1c6e
    • D
      Support for lilly-1131 modules and baseboards [v2] · 8d9fb9bb
      Daniel Mack 提交于
      On Thu, May 28, 2009 at 08:42:23PM +0200, Sascha Hauer wrote:
      > > > Mail-Followup-To: Daniel Mack <daniel@caiaq.de>,
      > > > 	linux-arm-kernel@lists.arm.linux.org.uk
      > >
      > > ... which causes my mutt to only reply to the list.
      >
      > Ah, ok. /me hacking in muttrc... Does it work now?
      
      Yep :)
      
      > >  	mxc_register_device(&mxc_uart_device0, &uart_pdata);
      > > +	mxc_register_device(&mxc_uart_device1, &uart_pdata);
      > > +	mxc_register_device(&mxc_uart_device2, &uart_pdata);
      >
      > What about the RXD3/TXD3 pins?
      
      You're right - I got the IOMUX tables wrong and thought UART0 pins are
      selected unconditionally. But as it turns out TXD1/RXD1 is for UART0
      (mxc_uart_device0), TXD2/RXD2 for UART1 (mxc_uart_device1) etc.
      
      Below is a new patch.
      
      Thanks,
      Daniel
      
      From e7eb5fa0fed09d667a4b2f168fe466e2cc645abb Mon Sep 17 00:00:00 2001
      From: Daniel Mack <daniel@caiaq.de>
      Date: Wed, 27 May 2009 12:22:51 +0200
      Subject: [PATCH] ARM: MX3: add two more UARTs to lilly-1131-db
      Signed-off-by: NDaniel Mack <daniel@caiaq.de>
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      8d9fb9bb
  6. 02 6月, 2009 1 次提交
  7. 31 5月, 2009 2 次提交
  8. 30 5月, 2009 3 次提交
    • C
      Fix the VFP handling on the Feroceon CPU · 85d6943a
      Catalin Marinas 提交于
      This CPU generates synchronous VFP exceptions in a non-standard way -
      the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the
      VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP
      subarchitecture 2. The main problem is that the faulty instruction
      (which needs to be emulated in software) will be restarted several times
      (normally until a context switch disables the VFP). This patch ensures
      that the VFP exception is treated as synchronous.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      Cc: Nicolas Pitre <nico@cam.org>
      85d6943a
    • C
      Add core support for ARMv6/v7 big-endian · 26584853
      Catalin Marinas 提交于
      Starting with ARMv6, the CPUs support the BE-8 variant of big-endian
      (byte-invariant). This patch adds the core support:
      
      - setting of the BE-8 mode via the CPSR.E register for both kernel and
        user threads
      - big-endian page table walking
      - REV used to rotate instructions read from memory during fault
        processing as they are still little-endian format
      - Kconfig and Makefile support for BE-8. The --be8 option must be passed
        to the final linking stage to convert the instructions to
        little-endian
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      26584853
    • C
      RealView: Move the IRQ_* definitions out of the board-*.h files · ee8c9571
      Catalin Marinas 提交于
      The IRQ_* macros need to be made visible via the mach/irqs.h file but
      without the additional macros defined in the board-*.h files.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      ee8c9571