- 11 6月, 2009 5 次提交
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由 wanzongshun 提交于
Add default configure file for w90p910 platform. Signed-off-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 wanzongshun 提交于
Add clock api for w90p910 platform. Signed-off-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 wanzongshun 提交于
Add gpio api for w90p910 platform. Signed-off-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 wanzongshun 提交于
Add multi-function pin api for w90p910 platform. Signed-off-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 6月, 2009 23 次提交
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由 Santosh Shilimkar 提交于
This patch updates omap_4430sdp_defconfig to add SMP and LOCAL_TIMER support for OMAP4430 SDP platform. Additionally the defconfig is made in sync with 2.6.30-rc7 Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
This patch enables SMP on OMAP4430 SDP platform. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
This patch adds SMP platform specific parts for local(mpu) timer support for OMAP4430 platform. Each Cortex-a9 core has it's own local timer in the MPU domain. These timers are not in wakeup domain. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430 SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Nicolas Pitre 提交于
Always creating the physical mapping should do no harm, so let's remove the interface that was provided for its optional creation and make the mapping static. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Nicolas Pitre 提交于
We don't have to define resources to the minimal physical window size as setup_cpu_win() will cope with smaller sizes already. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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The security accelerator which can act as a puppet player for the crypto engine requires its commands in the sram. This patch adds support for the phys mapping and creates a platform device for the actual driver. [ nico: renamed device name from "mv,orion5x-crypto" to "mv_crypto" so to match the module name and be more generic for Kirkwood use ] Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Imre Kaloz 提交于
This patch adds support for the switch found on the Netgear WNR854T router. Signed-off-by: NImre Kaloz <kaloz@openwrt.org> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Nicolas Pitre 提交于
The Orion watchdog driver is also used on Kirkwood. Convention is to use orion5x for stuff specific to 88F5xxx Orion chips and simply "orion" for shared stuff across SoCs including Kirkwood. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Thomas Reitmayr 提交于
The Kirkwood architecture uses the same watchdog device as the Orion architecture. This patch adds orion5x_wdt as a platform device for Kirkwood. Signed-off-by: NThomas Reitmayr <treitmayr@devbase.at> Tested-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Thomas Reitmayr 提交于
The name of the define for the Reset-Out-Mask register as well as its bit for the watchdog reset are changed to match the names used for Kirkwood (which in turn match the processor specification more closely). There is no functional change. This patch prepares for adding orion5x_wdt as a platform device to Kirkwood. Signed-off-by: NThomas Reitmayr <treitmayr@devbase.at> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Rabeeh Khoury 提交于
To save power: 1. Enabling clock gating of unused peripherals 2. PLL and PHY of the units are also disabled (when possible. Signed-off-by: NRabeeh Khoury <rabeeh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Nicolas Pitre 提交于
Common resource and platform device structures are moved to common.c and only the partition table and chip delay remains a per board parameter. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Erik Benada 提交于
Signed-off-by: NErik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Nicolas Pitre 提交于
Just like commit 1419468a, let's save some TLB entries by making ioremap() return pointers into the boot-time Kirkwood peripheral iotable mapping whenever someone tries to ioremap any part of the Kirkwood peripheral register space. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Siddarth Gore 提交于
Signed-off-by: NSiddarth Gore <gores@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Nicolas Pitre 提交于
With a TCLK = 200MHz, the half period of the hardware timer is roughly 10 seconds. Because cnt32_to_63() must be called at least once per half period of the base hardware counter, it is a bit risky to rely solely on scheduling to generate frequent enough calls. Let's use a kernel timer to ensure this. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Stefan Agner 提交于
sched_clock implementation for orion platform. Its realized using free-running clocksource timer, which provides a resolution of 7.5ns (depending on tclk). It's derived from PXA's sched_clock implementation. [ nico: renamed orion2ns to tclk2ns, fixed max value in the comment ] Signed-off-by: NStefan Agner <stefan.agner@yahoo.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Rabeeh Khoury 提交于
The patch adds support for Kirkwood cpu idle. Two idle states are defined: 1. Wait-for-interrupt (replacing default kirkwood wfi) 2. Wait-for-interrupt and DDR self refresh Signed-off-by: NRabeeh Khoury <rabeeh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Martin Fuzzey 提交于
* Use correct clkdev style usb clock name * Implement rate setting for USB clock * Introduce _clk_generic_round_rate to factorize the (now 3) uses of rounding code. Signed-off-by: NMartin Fuzzey <mfuzzey@gmail.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 05 6月, 2009 2 次提交
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由 Simon POLETTE 提交于
Hi, Fixed issue in the mxc-master head : Signed-off-by: NSimon POLETTE <spolette@adnlysd018.(none)> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Tony Lindgren 提交于
This can be used for other arm platforms too as discussed on the linux-arm-kernel list. Also check the return value with IS_ERR and return PTR_ERR as suggested by Russell King. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 04 6月, 2009 2 次提交
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由 Daniel Schaeffer 提交于
Sascha Hauer wrote: > On Tue, Jun 02, 2009 at 04:18:42PM -0400, Daniel Schaeffer wrote: >> Add basic support for the Logic i.MX27LITE board. >> >> Signed-off-by: Daniel Schaeffer <daniel.schaeffer@timesys.com> > > Besides the comment made by Fabio this looks ok to me. > > Sascha > > Fixed issues pointed out by Fabio and Magnus, and rebased to mxc-master head. Signed-off-by: NDaniel Schaeffer <daniel.schaeffer@timesys.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Alexander Clouter 提交于
Add hook so that the HW RNG source on the TS-78xx is available. Signed-off-by: NAlexander Clouter <alex@digriz.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 03 6月, 2009 2 次提交
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由 Fabio Estevam 提交于
Add basic support for MX35PDK board (www.freescale.com/imx35pdk). Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Daniel Mack 提交于
On Thu, May 28, 2009 at 08:42:23PM +0200, Sascha Hauer wrote: > > > Mail-Followup-To: Daniel Mack <daniel@caiaq.de>, > > > linux-arm-kernel@lists.arm.linux.org.uk > > > > ... which causes my mutt to only reply to the list. > > Ah, ok. /me hacking in muttrc... Does it work now? Yep :) > > mxc_register_device(&mxc_uart_device0, &uart_pdata); > > + mxc_register_device(&mxc_uart_device1, &uart_pdata); > > + mxc_register_device(&mxc_uart_device2, &uart_pdata); > > What about the RXD3/TXD3 pins? You're right - I got the IOMUX tables wrong and thought UART0 pins are selected unconditionally. But as it turns out TXD1/RXD1 is for UART0 (mxc_uart_device0), TXD2/RXD2 for UART1 (mxc_uart_device1) etc. Below is a new patch. Thanks, Daniel From e7eb5fa0fed09d667a4b2f168fe466e2cc645abb Mon Sep 17 00:00:00 2001 From: Daniel Mack <daniel@caiaq.de> Date: Wed, 27 May 2009 12:22:51 +0200 Subject: [PATCH] ARM: MX3: add two more UARTs to lilly-1131-db Signed-off-by: NDaniel Mack <daniel@caiaq.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 02 6月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
This mostly adds back AppleTouch support and adds CONFIG_HIGHMEM by default. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 31 5月, 2009 2 次提交
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由 Russell King 提交于
Kconfig entries default to n, so there's no need for this to be explicitly specified. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Marek Vašut 提交于
Support for Palm LifeDrive's internal harddrive. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Acked-by: NJeff Garzik <jgarzik@redhat.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 30 5月, 2009 3 次提交
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由 Catalin Marinas 提交于
This CPU generates synchronous VFP exceptions in a non-standard way - the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP subarchitecture 2. The main problem is that the faulty instruction (which needs to be emulated in software) will be restarted several times (normally until a context switch disables the VFP). This patch ensures that the VFP exception is treated as synchronous. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Cc: Nicolas Pitre <nico@cam.org>
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由 Catalin Marinas 提交于
Starting with ARMv6, the CPUs support the BE-8 variant of big-endian (byte-invariant). This patch adds the core support: - setting of the BE-8 mode via the CPSR.E register for both kernel and user threads - big-endian page table walking - REV used to rotate instructions read from memory during fault processing as they are still little-endian format - Kconfig and Makefile support for BE-8. The --be8 option must be passed to the final linking stage to convert the instructions to little-endian Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Catalin Marinas 提交于
The IRQ_* macros need to be made visible via the mach/irqs.h file but without the additional macros defined in the board-*.h files. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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