1. 09 3月, 2014 2 次提交
  2. 01 3月, 2014 1 次提交
  3. 14 2月, 2014 3 次提交
    • J
      serial: 8250: Support XR17V35x fraction divisor · 45a7bd63
      Joe Schultz 提交于
      The Exar XR17V35x family of UARTs have an additional fractional divisor
      register (DLD) which was not being used. Calculate and set this
      register for these devices to reduce their baud rate error.
      Signed-off-by: NJoe Schultz <jschultz@xes-inc.com>
      Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      45a7bd63
    • D
      serial: 8250_pci: unbreak last serial ports on NetMos 9865 cards · 333c085e
      Dmitry Eremin-Solenikov 提交于
      Aparently 9865 uses standard BAR encoding scheme (unlike 99xx cards).
      Current pci_netmos_9900_setup() uses wrong BAR indices for the 9865 PCI
      device, function 2. Using standard BAR indices makes all 6 ports work
      for me. Thus disable the NetMos 9900 quirk for NetMos 9865 pci device.
      
      For the reference, here is the relevant part of lspci for my device:
      
      02:07.0 Serial controller: MosChip Semiconductor Technology Ltd. PCI
      9865 Multi-I/O Controller (prog-if 02 [16550])
      	Subsystem: Device a000:1000
      	Flags: bus master, medium devsel, latency 32, IRQ 17
      	I/O ports at ac00 [size=8]
      	Memory at fcfff000 (32-bit, non-prefetchable) [size=4K]
      	Memory at fcffe000 (32-bit, non-prefetchable) [size=4K]
      	Capabilities: [48] Power Management version 2
      	Kernel driver in use: serial
      
      02:07.1 Serial controller: MosChip Semiconductor Technology Ltd. PCI
      9865 Multi-I/O Controller (prog-if 02 [16550])
      	Subsystem: Device a000:1000
      	Flags: bus master, medium devsel, latency 32, IRQ 18
      	I/O ports at a800 [size=8]
      	Memory at fcffd000 (32-bit, non-prefetchable) [size=4K]
      	Memory at fcffc000 (32-bit, non-prefetchable) [size=4K]
      	Capabilities: [48] Power Management version 2
      	Kernel driver in use: serial
      
      02:07.2 Communication controller: MosChip Semiconductor Technology Ltd.
      PCI 9865 Multi-I/O Controller
      	Subsystem: Device a000:3004
      	Flags: bus master, medium devsel, latency 32, IRQ 19
      	I/O ports at a400 [size=8]
      	I/O ports at a000 [size=8]
      	I/O ports at 9c00 [size=8]
      	I/O ports at 9800 [size=8]
      	Memory at fcffb000 (32-bit, non-prefetchable) [size=4K]
      	Capabilities: [48] Power Management version 2
      	Kernel driver in use: serial
      Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      333c085e
    • M
      serial: 8250_dw: fix compilation warning when !CONFIG_PM_SLEEP · 13b949f0
      Mika Westerberg 提交于
      CONFIG_PM will be set if either or both CONFIG_PM_SLEEP and
      CONFIG_PM_RUNTIME is set. Compiling the driver with !CONFIG_PM_SLEEP causes
      following compilation warnings:
      
      drivers/tty/serial/8250/8250_dw.c:404:12: warning: ‘dw8250_suspend’ defined but not used [-Wunused-function]
      drivers/tty/serial/8250/8250_dw.c:413:12: warning: ‘dw8250_resume’ defined but not used [-Wunused-function]
      
      Fix this by using CONFIG_PM_SLEEP instead.
      Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      13b949f0
  4. 08 1月, 2014 2 次提交
    • S
      serial: 8250: enable UART_BUG_NOMSR for Tegra · 3685f19e
      Stephen Warren 提交于
      Tegra chips have 4 or 5 identical UART modules embedded. UARTs C..E have
      their MODEM-control signals tied off to a static state. However UARTs A
      and B can optionally route those signals to/from package pins, depending
      on the exact pinmux configuration.
      
      When these signals are not routed to package pins, false interrupts may
      trigger either temporarily, or permanently, all while not showing up in
      the IIR; it will read as NO_INT. This will eventually lead to the UART
      IRQ being disabled due to unhandled interrupts. When this happens, the
      kernel may print e.g.:
      
          irq 68: nobody cared (try booting with the "irqpoll" option)
      
      In order to prevent this, enable UART_BUG_NOMSR. This prevents
      UART_IER_MSI from being enabled, which prevents the false interrupts
      from triggering.
      
      In practice, this is not needed under any of the following conditions:
      
      * On Tegra chips after Tegra30, since the HW bug has apparently been
        fixed.
      
      * On UARTs C..E since their MODEM control signals are tied to the correct
        static state which doesn't trigger the issue.
      
      * On UARTs A..B if the MODEM control signals are routed out to package
        pins, since they will then carry valid signals.
      
      However, we ignore these exceptions for now, since they are only relevant
      if a board actually hooks up more than a 4-wire UART, and no currently
      supported board does this. If we ever support a board that does, we can
      refine the algorithm that enables UART_BUG_NOMSR to take those exceptions
      into account, and/or read a flag from DT/... that indicates that the
      board has hooked up and pinmux'd more than a 4-wire UART.
      
      Reported-by: Olof Johansson <olof@lixom.net> # autotester
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      3685f19e
    • P
      tty: delete non-required instances of include <linux/init.h> · f8e87cb4
      Paul Gortmaker 提交于
      None of these files are actually using any __init type directives
      and hence don't need to include <linux/init.h>.  Most are just a
      left over from __devinit and __cpuinit removal, or simply due to
      code getting copied from one driver to the next.
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      f8e87cb4
  5. 20 12月, 2013 2 次提交
  6. 18 12月, 2013 1 次提交
  7. 17 12月, 2013 1 次提交
  8. 09 12月, 2013 3 次提交
  9. 26 11月, 2013 1 次提交
  10. 20 10月, 2013 1 次提交
  11. 18 10月, 2013 1 次提交
  12. 17 10月, 2013 1 次提交
  13. 04 10月, 2013 1 次提交
    • T
      serial: 8250_dw: Improve unwritable LCR workaround · c49436b6
      Tim Kryger 提交于
      When configured with UART_16550_COMPATIBLE=NO or in versions prior to
      the introduction of this option, the Designware UART will ignore writes
      to the LCR if the UART is busy.  The current workaround saves a copy of
      the last written LCR and re-writes it in the ISR for a special interrupt
      that is raised when a write was ignored.
      
      Unfortunately, interrupts are typically disabled prior to performing a
      sequence of register writes that include the LCR so the point at which
      the retry occurs is too late.  An example is serial8250_do_set_termios()
      where an ignored LCR write results in the baud divisor not being set and
      instead a garbage character is sent out the transmitter.
      
      Furthermore, since serial_port_out() offers no way to indicate failure,
      a serious effort must be made to ensure that the LCR is actually updated
      before returning back to the caller.  This is difficult, however, as a
      UART that was busy during the first attempt is likely to still be busy
      when a subsequent attempt is made unless some extra action is taken.
      
      This updated workaround reads back the LCR after each write to confirm
      that the new value was accepted by the hardware.  Should the hardware
      ignore a write, the TX/RX FIFOs are cleared and the receive buffer read
      before attempting to rewrite the LCR out of the hope that doing so will
      force the UART into an idle state.  While this may seem unnecessarily
      aggressive, writes to the LCR are used to change the baud rate, parity,
      stop bit, or data length so the data that may be lost is likely not
      important.  Admittedly, this is far from ideal but it seems to be the
      best that can be done given the hardware limitations.
      
      Lastly, the revised workaround doesn't touch the LCR in the ISR, so it
      avoids the possibility of a "serial8250: too much work for irq" lock up.
      This problem is rare in real situations but can be reproduced easily by
      wiring up two UARTs and running the following commands.
      
        # stty -F /dev/ttyS1 echo
        # stty -F /dev/ttyS2 echo
        # cat /dev/ttyS1 &
        [1] 375
        # echo asdf > /dev/ttyS1
        asdf
      
        [   27.700000] serial8250: too much work for irq96
        [   27.700000] serial8250: too much work for irq96
        [   27.710000] serial8250: too much work for irq96
        [   27.710000] serial8250: too much work for irq96
        [   27.720000] serial8250: too much work for irq96
        [   27.720000] serial8250: too much work for irq96
        [   27.730000] serial8250: too much work for irq96
        [   27.730000] serial8250: too much work for irq96
        [   27.740000] serial8250: too much work for irq96
      Signed-off-by: NTim Kryger <tim.kryger@linaro.org>
      Reviewed-by: NMatt Porter <matt.porter@linaro.org>
      Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org>
      Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c49436b6
  14. 01 10月, 2013 1 次提交
  15. 28 9月, 2013 2 次提交
  16. 27 9月, 2013 4 次提交
  17. 20 8月, 2013 1 次提交
    • T
      serial: 8250_dw: Report CTS asserted for auto flow · 33acbb82
      Tim Kryger 提交于
      When a serial port is configured for RTS/CTS flow control, serial core
      will disable the transmitter if it observes CTS is de-asserted. This is
      perfectly reasonable and appropriate when the UART lacks the ability to
      automatically perform CTS flow control.
      
      However, if the UART hardware can manage flow control automatically, it
      is important that software not get involved.  When the DesignWare UART
      enables 16C750 style auto-RTS/CTS it stops generating interrupts for
      changes in CTS state so software mostly stays out of the way.  However,
      it does report the true state of CTS in the MSR so software may notice
      it is de-asserted and respond by improperly disabling the transmitter.
      Once this happens the transmitter will be blocked forever.
      
      To avoid this situation, we simply lie to the 8250 and serial core by
      reporting that CTS is asserted whenever auto-RTS/CTS mode is enabled.
      Signed-off-by: NTim Kryger <tim.kryger@linaro.org>
      Reviewed-by: NMatt Porter <matt.porter@linaro.org>
      Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      33acbb82
  18. 13 8月, 2013 1 次提交
  19. 01 8月, 2013 2 次提交
  20. 27 7月, 2013 4 次提交
  21. 25 7月, 2013 1 次提交
    • H
      tty/8250_early: Don't truncate last character of options · 258a9fd1
      Henrik Nordström 提交于
      The earlier change to use strlcpy uncovered a bug in the options
      argument length calculation causing last character to be truncated.
      This makes the actual console to be configured with incorrect
      baudrate when specifying the console using console=uart,... syntax.
      
      Bug symptom seen in kernel log output:
      
      Kernel command line: console=uart,mmio,0x90000000,115200
      Early serial console at MMIO 0x90000000 (options '11520')
      
      which then results in a invalid baud rate 11520 instead of the
      expected 115200 when the console is switched to ttyS0 later
      in the boot process.
      Signed-off-by: NHenrik Nordstrom <henrik@henriknordstrom.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      258a9fd1
  22. 01 7月, 2013 2 次提交
  23. 19 6月, 2013 1 次提交
  24. 04 6月, 2013 1 次提交