- 04 3月, 2011 2 次提交
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion GPIO code pass in GPIO-related platform info (GPIO controller base address, secondary base IRQ number, etc) explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 14 1月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Acked-by: NNicolas Pitre <nico@fluxnic.net>
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- 23 12月, 2010 3 次提交
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由 Russell King 提交于
Convert orion platforms to use the new sched_clock() infrastructure for extending 32bit counters to full 64-bit nanoseconds. Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
ftrace requires sched_clock() to be notrace. Ensure that all implementations are so marked. Also make sure that they include linux/sched.h Also ensure OMAP clocksource read functions are marked notrace as they're used for sched_clock() too. Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NWill Deacon <will.deacon@arm.com> Tested-by: NMikael Pettersson <mikpe@it.uu.se> Tested-by: NEric Miao <eric.y.miao@gmail.com> Tested-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
In d7e81c26 (clocksource: Add clocksource_register_hz/khz interface) new interfaces were added which simplify (and optimize) the selection of the divisor shift/mult constants. Switch over to using this new interface. Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 10月, 2010 1 次提交
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由 Nicolas Pitre 提交于
Commit 21f0ba90 "orion/kirkwood: reset PCIe unit on boot" made the reset of the PCIe unit unconditional. While this may fix problems on some targets, this also causes problems on other targets. Saeed Bishara <saeed@marvell.com> said about the original problem: "We couln't pinpoint the root cause of this issue, actually we failed to reproduce that issue." So let's restrict the reset of the PCIe unit only to the target where the original problem was observed. Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 17 7月, 2010 1 次提交
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由 Olaf Rempel 提交于
Patch found in QNAPs vendor source package, with some cleanups (proper defines, shortened max. timeout from 1s to 200ms). Without this patch the PCIe SATA controller (Marvell 88sx7042/sata_mv) in my QNAP TS-419P (Marvell 88f6281/Kirkwood) stops working after a few minutes. The symptomes are described in this thread: http://marc.info/?l=linux-ide&m=124822863706181&w=2 [ Note: this is a workaround in need of a better analysis/solution -- NP ] Acked-by: NSaeed Bishara <saeed@marvell.com> Tested-by: NBernhard R. Link <brl@pcpool00.mathematik.uni-freiburg.de> Seconded-by: NMartin Michlmayr <tbm@cyrius.com> I'm_not_very_happy_with_it-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 31 5月, 2010 1 次提交
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由 apatard@mandriva.com 提交于
This patch add audio related definitions and functions Signed-off-by: NArnaud Patard <apatard@mandriva.com> Acked-by: NNicolas Pitre <nico@fluxnic.net> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 14 5月, 2010 1 次提交
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由 Ben Dooks 提交于
Add support for a board to register a callback to get the state of the RnB line if it has it attached. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 29 12月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
The PCIe inbound window size is supposed to be a power of two. If the total amount of RAM installed in the system is not a power of two, round it up such that it is. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 24 8月, 2009 1 次提交
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由 Martin Michlmayr 提交于
Include linux/init.h for __init to fix this error: CC [M] drivers/net/wireless/wl12xx/boot.o In file included from arch/arm/mach-kirkwood/include/mach/gpio.h:13, from arch/arm/include/asm/gpio.h:5, from include/linux/gpio.h:7, from drivers/net/wireless/wl12xx/boot.c:24: arch/arm/plat-orion/include/plat/gpio.h:32: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘orion_gpio_init’ make[6]: *** [drivers/net/wireless/wl12xx/boot.o] Error 1 make[5]: *** [drivers/net/wireless/wl12xx] Error 2 Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 09 6月, 2009 4 次提交
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由 Nicolas Pitre 提交于
The Orion watchdog driver is also used on Kirkwood. Convention is to use orion5x for stuff specific to 88F5xxx Orion chips and simply "orion" for shared stuff across SoCs including Kirkwood. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Erik Benada 提交于
Signed-off-by: NErik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Nicolas Pitre 提交于
With a TCLK = 200MHz, the half period of the hardware timer is roughly 10 seconds. Because cnt32_to_63() must be called at least once per half period of the base hardware counter, it is a bit risky to rely solely on scheduling to generate frequent enough calls. Let's use a kernel timer to ensure this. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Stefan Agner 提交于
sched_clock implementation for orion platform. Its realized using free-running clocksource timer, which provides a resolution of 7.5ns (depending on tclk). It's derived from PXA's sched_clock implementation. [ nico: renamed orion2ns to tclk2ns, fixed max value in the comment ] Signed-off-by: NStefan Agner <stefan.agner@yahoo.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 24 4月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Symbols like SOFT_RESET are way too generic to be exported at large. To avoid this, let's move the mbus bridge register defines into a separate file and include it where needed. This affects mach-kirkwood, mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all share code in plat-orion which relies on those defines. Some other defines have been moved to narrower scopes, or simply deleted when they had no user. This fixes compilation problem with mpt2sas on the above listed platforms. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 4月, 2009 1 次提交
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由 Magnus Damm 提交于
Pass clocksource pointer to the read() callback for clocksources. This allows us to share the callback between multiple instances. [hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods] [akpm@linux-foundation.org: cleanup] Signed-off-by: NMagnus Damm <damm@igel.co.jp> Acked-by: NJohn Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NHugh Dickins <hugh@veritas.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 25 3月, 2009 2 次提交
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由 Thomas Reitmayr 提交于
The orion5x-wdt driver is now registered as a platform device and receives the tclk value as platform data. This fixes a compile issue cause by a previously removed define "ORION5X_TCLK". Signed-off-by: NThomas Reitmayr <treitmayr@devbase.at> Acked-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NKristof Provost <kristof@sigsegv.be> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Martin Michlmayr <tbm@cyrius.com> Cc: Sylver Bruneau <sylver.bruneau@googlemail.com> Cc: Kunihiko IMAI <bak@d2.dion.ne.jp> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
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由 Maen Suleiman 提交于
This supports MMC/SD/SDIO currently found on the Kirkwood 88F6281 and 88F6192 SoC controllers. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 27 2月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 20 2月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Especially on Kirkwood, a couple GPIOs are actually only output capable. Let's separate the ability to configure a GPIO as input or output to accommodate this restriction. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 18 2月, 2009 1 次提交
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由 Nicolas Pitre 提交于
The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 12月, 2008 2 次提交
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由 Lennert Buytenhek 提交于
Split off Orion GPIO IRQ handling code into plat-orion/. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 13 12月, 2008 1 次提交
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由 Rusty Russell 提交于
Impact: change calling convention of existing clock_event APIs struct clock_event_timer's cpumask field gets changed to take pointer, as does the ->broadcast function. Another single-patch change. For safety, we BUG_ON() in clockevents_register_device() if it's not set. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Cc: Ingo Molnar <mingo@elte.hu>
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- 04 12月, 2008 1 次提交
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由 Ronen Shitrit 提交于
The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: NRonen Shitrit <rshitrit@marvell.com>
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- 03 12月, 2008 1 次提交
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由 Saeed Bishara 提交于
The function field is 3 bits. Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 09 8月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
This patch performs the equivalent include directory shuffle for plat-orion, and fixes up all users. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 07 8月, 2008 1 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 6月, 2008 3 次提交
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由 Lennert Buytenhek 提交于
The Discovery Duo (MV78xx0) has two x4 PCIe ports which can either be used in x4 mode or in quad x1 mode. This patch adds an accessor function to the generic plat-orion PCIe handling code to detect in which of the two modes we're running (which is determined by strap pins and/or configured by the bootloader). Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Ke Wei 提交于
Some Feroceon-based SoCs have an MBUS bridge interrupt controller that requires writing a one instead of a zero to clear edge interrupt sources such as timer expiry. This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
Make it clear that Orion top-level IRQs are level-triggered. This means that we don't need an ->ack() handler, or at least, we don't need the ->ack() handler (or the acking part of the ->mask_ack() handler) to actually do anything. Given that, we might as well point our ->mask_ack() handler at the ->mask() handler instead of providing a dummy ->ack() handler, since providing a ->mask_ack() handler on level IRQ sources will prevent ->ack() from ever being called. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NRussell King <linux@arm.linux.org.uk>
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- 10 4月, 2008 1 次提交
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由 Nicolas Pitre 提交于
Without this, lspci won't work. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 3月, 2008 4 次提交
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由 Lennert Buytenhek 提交于
Split off Orion time handling code into plat-orion/. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Split off Orion PCIe handling code into plat-orion/. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Split off Orion IRQ handling code into plat-orion/, and add support for multiple sets of (32) interrupts. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Create arch/arm/plat-orion/, for peripherals shared between various Marvell Orion SoCs. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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