- 04 3月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 04 3月, 2009 1 次提交
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由 Riku Voipio 提交于
All the pieces were ready, just matter of assembling them together. Signed-off-by: NRiku Voipio <riku.voipio@iki.fi> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 20 2月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
During boot, identify which chip stepping we're running on (determined by looking at the first PCIe unit's device ID and revision registers), and print a message with the details about what we found. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 23 6月, 2008 1 次提交
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由 Stanislav Samsonov 提交于
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: NStanislav Samsonov <samsonov@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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