- 18 6月, 2014 2 次提交
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由 Bjorn Helgaas 提交于
If we issue a hotplug command, go do something else, then come back and wait for the command to complete, we don't have to wait the whole timeout period, because some of it elapsed while we were doing something else. Keep track of the time we issued the command, and wait only until the timeout period from that point has elapsed. For controllers with errata like Intel CF118, we previously timed out before issuing the second hotplug command: At time T1 (during boot): - Write DLLSCE, ABPE, PDCE, etc. to Slot Control At time T2 (hotplug event): - Wait for command completion (CC) in Slot Status - Timeout at T2 + 1 second because CC is never set in Slot Status - Write PCC, PIC, etc. to Slot Control With this change, we wait until T1 + 1 second instead of T2 + 1 second. If the hotplug event is more than 1 second after the boot-time initialization, we won't wait for the timeout at all. We still emit a "Timeout on hotplug command" message if it timed out; we should see this on the first hotplug event on every controller with this erratum, as well as on real errors on controllers without the erratum. Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NYinghai Lu <yinghai@kernel.org>
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由 Bjorn Helgaas 提交于
Previously we issued a hotplug command and waited for it to complete. But there's no need to wait until we're ready to issue the *next* command. The next command will probably be much later, so the first one may have already completed and we may not have to actually wait at all. Because of hardware errata, some controllers generate command completion events for some commands but not others. In the case of Intel CF118 (see spec update reference), the controller indicates command completion only for Slot Control writes that change the value of the following bits: Power Controller Control Power Indicator Control Attention Indicator Control Electromechanical Interlock Control Changes to other bits, e.g., the interrupt enable bits, do not cause the Command Completed bit to be set. Controllers from AMD and Nvidia are reported to have similar errata. These errata cause timeouts when pcie_enable_notification() enables interrupts. Previously that timeout occurred at boot-time. With this change, the timeout occurs later, when we change the state of the slot power, indicators, or interlock. This speeds up boot but causes a timeout at the first hotplug event on the slot. Subsequent events don't timeout because only the first (boot-time) hotplug command updates Slot Control without touching the power/indicator/interlock controls. Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NYinghai Lu <yinghai@kernel.org>
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- 17 6月, 2014 1 次提交
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由 Bjorn Helgaas 提交于
pcie_wait_cmd() waits for the controller to finish a hotplug command. Move the associated logic (to determine whether waiting is required and whether we're using interrupts or polling) from pcie_write_cmd() to pcie_wait_cmd(). No functional change. Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NYinghai Lu <yinghai@kernel.org>
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- 11 6月, 2014 2 次提交
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由 Ryan Desfosses 提交于
Merge quoted strings that are broken across lines into a single entity. The compiler merges them anyway, but checkpatch complains about it, and merging them makes it easier to grep for strings. No functional change. [bhelgaas: changelog, do the same for everything under drivers/pci] Signed-off-by: NRyan Desfosses <ryan@desfo.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Ryan Desfosses 提交于
Fix various whitespace errors. No functional change. [bhelgaas: fix other similar problems] Signed-off-by: NRyan Desfosses <ryan@desfo.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 25 4月, 2014 1 次提交
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由 Rajat Jain 提交于
In case of a spurious "cmd completed", pcie_write_cmd() does not clear it, but yet expects more "cmd completed" events to be generated. This does not happen because the previous (spurious) event has not been acknowledged. Fix that. Signed-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 20 2月, 2014 1 次提交
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由 Rajat Jain 提交于
In case a card is physically yanked out, it should immediately be removed, regardless of the "surprise" capability bit. Thus: - Always handle the physical removal - regardless of the "surprise" bit. - Don't use "surprise" capability when making decisions about enabling presence detect notifications. - Reword the comments to indicate the intent. Signed-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 12 2月, 2014 4 次提交
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由 Rajat Jain 提交于
Today it is there is no protection around pciehp_enable_slot() and pciehp_disable_slot() to ensure that they complete before another hot-plug operation can be done on that particular slot. This patch introduces the slot->hotplug_lock to ensure that any hotplug operations (add / remove) complete before another hotplug event can begin processing on that particular slot. Signed-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Rajat Jain 提交于
Disable the link notification (in addition to presence detect notifications) across the slot reset since the reset could flap the link, and we don't want to treat it as hot unplug followed by a hotplug. Signed-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Rajat Jain 提交于
We need future link up events for hot-add, thus don't disable the link permanently during device removal. Also, remove the static functions that are now left unused. This reverts part of 2debd928 ("PCI: pciehp: Disable/enable link during slot power off/on"). This was discussed at the URL below, where it was revealed that it was done for a bug in a PCIe repeater chip on that particular platform. Link: https://lkml.kernel.org/r/CAErSpo72KZ-a2OSQLWoK71GCgwBt676XZdGt4tEYm-6UYnLmPw@mail.gmail.comSigned-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Rajat Jain 提交于
Enable the Link state notifications unconditionally. Enable the presence detection notification only if attention button is absent. This was discussed at this thread: https://lkml.kernel.org/r/529E5C0E.80903@gmail.comSigned-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 11 2月, 2014 2 次提交
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由 Rajat Jain 提交于
A lot of systems do not have the fancy buttons and LEDs, and instead want to rely only on the Link state change events to drive the hotplug and removal state machinery. (http://www.spinics.net/lists/hotplug/msg05802.html) This patch adds support for that functionality. Here are the details about the patch itself: * Define and use interrupt events for linkup / linkdown. * Make the pcie_isr() also look at link events, and direct control to corresponding (new) link state change handler function. * Introduce the functions to handle link-up and link-down events and queue the add / removal work in the slot->wq to be processed by pciehp_power_thread() As a side note, this patch also fixes the bug https://bugzilla.kernel.org/show_bug.cgi?id=65521 "pciehp ignores Data Link Layer State Changed bit." Signed-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Rajat Jain 提交于
check_link_active() functionality needs to be used by subsequent patches (that introduce link state change based hotplug). Thus make the function non-static, and rename it to pciehp_check_link_active() so as to be consistent with other non-static functions. Signed-off-by: NRajat Jain <rajatxjain@gmail.com> Signed-off-by: NRajat Jain <rajatjain@juniper.net> Signed-off-by: NGuenter Roeck <groeck@juniper.net> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 16 12月, 2013 7 次提交
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由 Bjorn Helgaas 提交于
Previously, the caller checked ATTN_LED() or PWR_LED() to see whether the slot has indicators before setting the indicator state. That clutters the caller unnecessarily, so this moves the test inside the callees. The test may not even be necessary; per spec it should be harmless to try to turn on a non-existent LED. But checking first does avoid unnecessary hotplug commands. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Add symbolic constants for the PCIe Slot Control indicator and power control fields defined by spec and use them instead of open-coded hex constants. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Use the PCI_EXP_SLTSTA definitions, not 0x1f, when clearing Slot Status bits. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
It's simpler to test the PCI_EXP_SLTSTA_PFD bit directly and to write the constant back to PCI_EXP_SLTSTA. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
We already have the vendor/device IDs from pci_setup_device(), so drop that info and print things that will be more useful for debugging: the slot number and presence of button/indicators/link active reporting/etc. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
These functions: pcie_enable_notification() pciehp_power_off_slot() pciehp_get_power_status() pciehp_get_attention_status() pciehp_set_attention_status() pciehp_get_latch_status() pciehp_get_adapter_status() pcie_write_cmd() now always return success, so this patch makes them void and drops the error-checking code in their callers. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
There's not much point in checking the return value from every config space access because the only likely errors are design-time things like unaligned accesses or invalid register numbers. The checking clutters the code significantly, so this patch removes it. No functional change. Reference: http://lkml.kernel.org/r/CA+55aFzP4xEbcNmZ+MS0SQ3LrULzSq+dBiT_X9U-bPpR-Ukgrw@mail.gmail.comSigned-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 15 12月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
The pciehp_readw() and pciehp_writew() wrappers only look up the pci_dev and call the PCIe Capability accessors, so we can make things a little more straightforward by just using the PCIe Capability accessors directly. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 15 11月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
Fix whitespace, capitalization, and spelling errors. No functional change. I know "busses" is not an error, but "buses" was more common, so I used it consistently. Signed-off-by: Marta Rybczynska <rybczynska@gmail.com> (pci_reset_bridge_secondary_bus()) Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 15 8月, 2013 1 次提交
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由 Alex Williamson 提交于
PCIe hotplug has a bus per slot, so we can just use a normal secondary bus reset. However, if a slot supports surprise removal, a bus reset can be seen as a presence detection change triggering a hot-remove followed by a hot-add. Disable presence detection from triggering an interrupt or being polled around the bus reset. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 04 7月, 2013 1 次提交
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由 Kees Cook 提交于
For the workqueue creation interfaces that do not expect format strings, make sure they cannot accidently be parsed that way. Additionally, clean up calls made with a single parameter that would be handled as a format string. Many callers are passing potentially dynamic string content, so use "%s" in those cases to avoid any potential accidents. Signed-off-by: NKees Cook <keescook@chromium.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 1月, 2013 1 次提交
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由 Yijing Wang 提交于
When we have a hotplug-capable PCIe port with a second hotplug-capable PCIe port below it, removing the device below the upstream port causes a deadlock. The deadlock happens because we use the pciehp_wq workqueue to run pciehp_power_thread(), which uses pciehp_disable_slot() to remove devices below the upstream port. When we remove the downstream PCIe port, we call pciehp_remove(), the pciehp driver's .remove() method. That calls flush_workqueue(pciehp_wq), which deadlocks because the pciehp_power_thread() work item is still running. This patch avoids the deadlock by creating a workqueue for every PCIe port and removing the single shared workqueue. Here's the call path that leads to the deadlock: pciehp_queue_pushbutton_work queue_work(pciehp_wq) # queue pciehp_power_thread ... pciehp_power_thread pciehp_disable_slot remove_board pciehp_unconfigure_device pci_stop_and_remove_bus_device ... pciehp_remove # pciehp driver .remove method pciehp_release_ctrl pcie_cleanup_slot flush_workqueue(pciehp_wq) This is fairly urgent because it can be caused by simply unplugging a Thunderbolt adapter, as reported by Daniel below. [bhelgaas: changelog] Reference: http://lkml.kernel.org/r/CAMVG2ssiRgcTD1bej2tkUUfsWmpL5eNtPcNif9va2-Gzb2u8nQ@mail.gmail.comReported-and-tested-by: NDaniel J Blueman <daniel@quora.org> Reviewed-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org
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- 24 8月, 2012 1 次提交
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由 Jiang Liu 提交于
Use PCI Express Capability access functions to simplify pciehp. Signed-off-by: NJiang Liu <jiang.liu@huawei.com> Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
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- 13 7月, 2012 1 次提交
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由 Yinghai Lu 提交于
Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
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- 15 2月, 2012 5 次提交
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由 Yinghai Lu 提交于
On a system with a repeater on the system board to support gen2 hotplug, we found that when an ExpressModule is removed from some slots, /var/log/messages will be full of "card present/not present" warnings. It turns out the root complex is continually trying to train the link to the repeater because the repeater has not been reset. This patch will disable the link at removal time to allow the repeater to be reset properly. This also prevents a potential AER message at removal time. Also, when testing hotplug on a system under development, we found if we boot the system without an EM installed, and later hot-add an EM, it does not work with Linux, but another OS is ok. The root cause is that BIOS left link disabled when slot was empty at boot time, and other OS is modifying the link disable bit in link ctrl during power on/off. So we should do the same thing to disable/enable link during power off/on. -v2: check link DLLA bit instead of 100ms waiting. Separate link disable/enable functions to another patch. Signed-off-by: NYinghai Lu <yinghai.lu@oracle.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yinghai Lu 提交于
Will use it during power off/on of slots Signed-off-by: NYinghai Lu <yinghai.lu@oracle.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yinghai Lu 提交于
Will use it for link disable status checking. Signed-off-by: NYinghai Lu <yinghai.lu@oracle.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yinghai Lu 提交于
A few changes: - remove the 'inline' and let the complier decide - return a bool to indicate whether the link was active - add a debug message to indicate link state when it beocmes active Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yinghai Lu 提交于
During reviewing | PCI: pciehp: wait 1000 ms before Link Training check Linus said: >... > That's a *long* time, and it's irritating to the user. It makes the > user think "the machine is slow". >... > And quite frankly, an unconditional one-second delay here seems bad. >Two seconds was unacceptable, one second is just bad. Try to access the pci conf of a pci device that is supposed to show up in 1s. If we can read back a valid vendor/device id, we can return early. Related discussion could be found: https://lkml.org/lkml/2011/12/6/339 -v2: seperate code to pci_bus_read_dev_vendor_id() from pci_scan_device() and reuse it from pciehp code. Suggested by Matthew Wilcox. -v3: According to Kenj, don't use array in stack, and don't wait too long for crs, also return fail status if not found. Also separate pci_bus_dev_read_vendor_id() change to another patch. Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 07 1月, 2012 1 次提交
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由 Kenji Kaneshige 提交于
Use non-ordered workqueue for attention button events. Attention button events on each slot can be handled asynchronously. So we should use non-ordered workqueue. This patch also removes ordered workqueue in pciehp as a result. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 06 12月, 2011 1 次提交
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由 Kenji Kaneshige 提交于
Use non-ordered workqueue for attention button events. Attention button events on each slot can be handled asynchronously. So we should use non-ordered workqueue. This patch also removes ordered workqueue in pciehp as a result. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 12 11月, 2011 2 次提交
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由 Kenji Kaneshige 提交于
If the port supports Link speeds greater than 5.0 GT/s, we must wait for 100 ms after Link training completes before sending configuration request. Acked-by: NYinghai Lu <yinghai@kernel.org> Tested-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Kenji Kaneshige 提交于
We need to wait for 1000 ms after Data Link Layer Link Active (DLLLA) bit reads 1b before sending configuration request. Currently pciehp does this wait after checking Link Training (LT) bit. But we need it before checking LT bit because LT is still set even after DLLLA bit is set on some platforms. Acked-by: NYinghai Lu <yinghai@kernel.org> Tested-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 08 11月, 2011 1 次提交
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由 Yinghai Lu 提交于
During hot plug, board_added will call pciehp_power_on_slot(). But link speed is updated in pciehp_power_on_slot(). We should not update link speed there, because that is too early. So move the link speed update to pciehp_check_link_status() after making sure the link has been trained. -v2: fix compile warning that Kenji found. Signed-off-by: NYinghai Lu <yinghai.lu@oracle.com> Reviewed-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Tested-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 23 7月, 2011 1 次提交
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由 Kenji Kaneshige 提交于
Naoki Yanagimoto reported that configuration read on some hot-added PCIe device returns invalid value. This patch fixes this problem. According to the PCIe spec, software must wait for at least 1 second to judge if the hot-added device is broken after Data Link Layer State Changed Event. This patch changes pciehp driver to wait for 1 second after the Data Link Layer State Changed Event is detected before initiating a configuration access instead of 100 ms. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Tested-by: NNaoki Yanagimoto <yanagimoto@np.css.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 18 10月, 2010 1 次提交
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由 Tejun Heo 提交于
* Rename pciehp_wq to pciehp_ordered_wq and add non-ordered pciehp_wq which is used instead of the system workqueue. This is to remove the use of flush_scheduled_work() which is deprecated and scheduled for removal. * With cmwq in place, there's no point in creating workqueues lazily. Create both pciehp_wq and pciehp_ordered_wq upfront. * Include workqueue.h from pciehp.h. Signed-off-by: NTejun Heo <tj@kernel.org> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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