1. 18 6月, 2014 2 次提交
    • B
      PCI: pciehp: Compute timeout from hotplug command start time · 40b96083
      Bjorn Helgaas 提交于
      If we issue a hotplug command, go do something else, then come back and
      wait for the command to complete, we don't have to wait the whole timeout
      period, because some of it elapsed while we were doing something else.
      
      Keep track of the time we issued the command, and wait only until the
      timeout period from that point has elapsed.
      
      For controllers with errata like Intel CF118, we previously timed out
      before issuing the second hotplug command:
      
        At time T1 (during boot):
          - Write DLLSCE, ABPE, PDCE, etc. to Slot Control
        At time T2 (hotplug event):
          - Wait for command completion (CC) in Slot Status
          - Timeout at T2 + 1 second because CC is never set in Slot Status
          - Write PCC, PIC, etc. to Slot Control
      
      With this change, we wait until T1 + 1 second instead of T2 + 1 second.
      If the hotplug event is more than 1 second after the boot-time
      initialization, we won't wait for the timeout at all.
      
      We still emit a "Timeout on hotplug command" message if it timed out; we
      should see this on the first hotplug event on every controller with this
      erratum, as well as on real errors on controllers without the erratum.
      
      Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html
      Tested-by: Rajat Jain <rajatxjain@gmail.com>	(IDT 807a controller)
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NYinghai Lu <yinghai@kernel.org>
      40b96083
    • B
      PCI: pciehp: Wait for hotplug command completion lazily · 3461a068
      Bjorn Helgaas 提交于
      Previously we issued a hotplug command and waited for it to complete.  But
      there's no need to wait until we're ready to issue the *next* command.  The
      next command will probably be much later, so the first one may have already
      completed and we may not have to actually wait at all.
      
      Because of hardware errata, some controllers generate command completion
      events for some commands but not others.  In the case of Intel CF118 (see
      spec update reference), the controller indicates command completion only
      for Slot Control writes that change the value of the following bits:
      
        Power Controller Control
        Power Indicator Control
        Attention Indicator Control
        Electromechanical Interlock Control
      
      Changes to other bits, e.g., the interrupt enable bits, do not cause the
      Command Completed bit to be set.  Controllers from AMD and Nvidia are
      reported to have similar errata.
      
      These errata cause timeouts when pcie_enable_notification() enables
      interrupts.  Previously that timeout occurred at boot-time.  With this
      change, the timeout occurs later, when we change the state of the slot
      power, indicators, or interlock.  This speeds up boot but causes a timeout
      at the first hotplug event on the slot.  Subsequent events don't timeout
      because only the first (boot-time) hotplug command updates Slot Control
      without touching the power/indicator/interlock controls.
      
      Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html
      Tested-by: Rajat Jain <rajatxjain@gmail.com>	(IDT 807a controller)
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NYinghai Lu <yinghai@kernel.org>
      3461a068
  2. 17 6月, 2014 1 次提交
  3. 11 6月, 2014 2 次提交
  4. 25 4月, 2014 1 次提交
  5. 20 2月, 2014 1 次提交
  6. 12 2月, 2014 4 次提交
  7. 11 2月, 2014 2 次提交
  8. 16 12月, 2013 7 次提交
  9. 15 12月, 2013 1 次提交
  10. 15 11月, 2013 1 次提交
  11. 15 8月, 2013 1 次提交
  12. 04 7月, 2013 1 次提交
  13. 13 1月, 2013 1 次提交
    • Y
      PCI: pciehp: Use per-slot workqueues to avoid deadlock · c2be6f93
      Yijing Wang 提交于
      When we have a hotplug-capable PCIe port with a second hotplug-capable
      PCIe port below it, removing the device below the upstream port causes
      a deadlock.
      
      The deadlock happens because we use the pciehp_wq workqueue to run
      pciehp_power_thread(), which uses pciehp_disable_slot() to remove devices
      below the upstream port.  When we remove the downstream PCIe port, we call
      pciehp_remove(), the pciehp driver's .remove() method.  That calls
      flush_workqueue(pciehp_wq), which deadlocks because the
      pciehp_power_thread() work item is still running.
      
      This patch avoids the deadlock by creating a workqueue for every PCIe port
      and removing the single shared workqueue.
      
      Here's the call path that leads to the deadlock:
      
        pciehp_queue_pushbutton_work
          queue_work(pciehp_wq)                   # queue pciehp_power_thread
          ...
      
        pciehp_power_thread
          pciehp_disable_slot
            remove_board
      	pciehp_unconfigure_device
      	  pci_stop_and_remove_bus_device
      	    ...
      	      pciehp_remove                 # pciehp driver .remove method
      		pciehp_release_ctrl
      		  pcie_cleanup_slot
      		    flush_workqueue(pciehp_wq)
      
      This is fairly urgent because it can be caused by simply unplugging a
      Thunderbolt adapter, as reported by Daniel below.
      
      [bhelgaas: changelog]
      Reference: http://lkml.kernel.org/r/CAMVG2ssiRgcTD1bej2tkUUfsWmpL5eNtPcNif9va2-Gzb2u8nQ@mail.gmail.comReported-and-tested-by: NDaniel J Blueman <daniel@quora.org>
      Reviewed-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NYijing Wang <wangyijing@huawei.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: stable@vger.kernel.org
      c2be6f93
  14. 24 8月, 2012 1 次提交
  15. 13 7月, 2012 1 次提交
  16. 15 2月, 2012 5 次提交
  17. 07 1月, 2012 1 次提交
  18. 06 12月, 2011 1 次提交
  19. 12 11月, 2011 2 次提交
  20. 08 11月, 2011 1 次提交
  21. 23 7月, 2011 1 次提交
  22. 18 10月, 2010 1 次提交
    • T
      pciehp: update workqueue usage · a827ea30
      Tejun Heo 提交于
      * Rename pciehp_wq to pciehp_ordered_wq and add non-ordered pciehp_wq
        which is used instead of the system workqueue.  This is to remove
        the use of flush_scheduled_work() which is deprecated and scheduled
        for removal.
      
      * With cmwq in place, there's no point in creating workqueues lazily.
        Create both pciehp_wq and pciehp_ordered_wq upfront.
      
      * Include workqueue.h from pciehp.h.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      a827ea30
  23. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6