The plain [EN|DIS]ABLE functions do the same thing and more
and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The plain [EN|DIS]ABLE functions do the same thing and more
and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

On SI asics, the SMC will automatically force the performance
level to the lowest level if there are no displays active.  This
prevents automatic performance scaling on PowerXpress systems or
for offscreen rendering or compute when displays are disabled.

Going forward, it would be best to dynamically change this, but
for now leave scaling enabled.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=69395Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Uses the CP ring rather than the DMA ring.  Useful
for debugging and benchmarking.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The rv6xx_clocks_per_unit() function pretends it can set flags in a u64
bitfield but really because "1" is an int it doesn't work for more than
32 bits.  The only caller truncates the high bits away anyway.  I've
just changed it to be a u32.
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Uses CP DMA packet just like previous asics.
Useful for debugging and benchmarking.  Uses
same packet format as prior asics.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Seems to be stable enough for the majority of users.
It can be disabled on the fly via connector attributes.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This hooks radeon up to the runtime PM system to enable
dynamic power management for secondary GPUs in switchable
and powerxpress laptops.

v2: agd5f: clean up, add module parameter
Signed-off-by: NDave Airlie <airlied@redhat.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This is a pre-requisite for runtime pm on powerxpress systems.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Allows you to enable dither in the display hardware
when the monitor supports lower a lower bpc than the
current framebuffer format.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The FMT blocks control how data is sent from the backend
of the display pipe to to monitor.  Proper set up of the
FMT blocks are required for 30bpp formats.  Additionally,
dithering can be enabled on for better display with 18 and
24bpp displays.  The exception is LVDS/eDP which atom
takes care of in the SelectCRTC_Source table.  For now
just enable truncation until we test dithering more.
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

device_unregister() already drops its reference to the struct device, so
explicitly calling put_device() before device_unregister() can cause the
device to have been freed before it can be unregistered.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: NBen Widawsky <ben@bwidawsk.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Merge tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

- CRC support from Damien and He Shuang. Long term this should allow us to
  test an awful lot modesetting corner cases automatically. So for me as
  the maintainer this is really big.
- HDMI audio fix from Jani.
- VLV dpll computation code refactoring from Ville.
- Fixups for the gpu booster from last time around (Chris).
- Some cleanups in the context code from Ben.
- More watermark work from Ville (we'll be getting there ...).
- vblank timestamp improvements from Ville.
- CONFIG_FB=n support, including drm core changes to make the fbdev
  helpers optional.
- DP link training improvements (Jani).
- mmio vtable from Ben, prep work for future hw.

* tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel: (132 commits)
  drm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp
  drm/i915: remove dead code in ironlake_crtc_mode_set
  drm/i915: crc support for hsw
  drm/i915: fix CRC debugfs setup
  drm/i915: wait one vblank when disabling CRCs
  drm/i915: use ->get_vblank_counter for the crc frame counter
  drm/i915: wire up CRC interrupt for ilk/snb
  drm/i915: add CRC #defines for ilk/snb
  drm/i915: extract display_pipe_crc_update
  drm/i915: don't Oops in debugfs for I915_FBDEV=n
  drm/i915: set HDMI pixel clock in audio configuration
  drm/i915: pass mode to ELD write vfuncs
  cpufreq: Add dummy cpufreq_cpu_get/put for CONFIG_CPU_FREQ=n
  drm/i915: check gem bo size when creating framebuffers
  drm/i915: Use unsigned long for obj->user_pin_count
  drm/i915: prevent tiling changes on framebuffer backing storage
  drm/i915: grab dev->struct_mutex around framebuffer_init
  drm/i915: vlv: fix VGA hotplug after modeset
  drm: add support for additional stereo 3D modes
  drm/i915: preserve dispaly init order on ByT
  ...

To disable a monitor, a Spice client sends a monitor config with the
monitor resolution to 0x0.

However, before qxl_crtc_disable() is reached after the hotplug event,
it can happen that another monitor is reconfigured, and
qxl_send_monitors_config() is called with the old config, which will
re-enable the monitor on the client.

Reset config if monitor is found disconnected, during
drm_helper_hpd_irq_event().
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

All hard-coded resolutions are passing this check.
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

By default, 1024x768 is the preferred resolution. However, when a
monitor config is given, it should be the only preferred resolution.

Note that the monitor config resolution is passed to
qxl_add_common_modes() to avoid adding a duplicate mode without the
preferred resolution. That would discard the previous monitor config
preferred bit.
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

In commit 38d5487d, Keith explained:
    This patch simply merges the two mode type bits together; that seems
    reasonable to me, but perhaps only a subset of the bits should be
    used? None of these can be user defined as they all come from
    looking at just the hardware.

However, merging the bits means that a flag becomes sticky. It is not
possible, for example to update the mode type to remove the
DRM_MODE_TYPE_PREFERRED bit.

After a brief discussion with Dave Airlie on irc, it was agreed to
propose that change, instead of introducing another function to remove a
bit from exisiting modes type.
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

drm_helper_hpd_irq_event() only notifies when the connector status
changed. However, Spice monitor config can change while the connector is
connected, to support arbitrary resolution. Do an hotplug event if it
wasn't done by drm_helper_hpd_irq_event().
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The caller may want to know whether the configuration was changed, and
if an hotplug event was sent.
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Fix a little spelling of drm_crtc_convert_umode() comment.
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Fix build on non-ARM
* 'drm-tda998x-3.12-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox:
  DRM: Armada: depend on ARM

Armada DRM uses relaxed accessors which are not available on other
platforms.  Limit it to just ARM.
Acked-by: NRob Clark <robdclark@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This adds support for the Armada 510 display subsystem found on the
Marvell Dove devices.  This IP is re-used across several different Marvell
SoCs with various tweaks, and this driver has been structured to allow
the other IPs to re-use the bulk of this code; further work in this area
is expected from interested parties.

This has been extensively tested on the SolidRun Cubox platform and
appears to work well there.

[airlied: update for api changes merged previous to this]

So drm was abusing device lifetimes, by having embedded device structures
in the minor and connector it meant that the lifetime of the internal drm
objects (drm_minor and drm_connector) were tied to the lifetime of the device
files in sysfs, so if something kept those files opened the current code
would kfree the objects and things would go downhill from there.

Now in reality there is no need for these lifetimes to be so intertwined,
especailly with hotplugging of devices where we wish to remove the sysfs
and userspace facing pieces before we can unwind the internal objects due
to open userspace files or mmaps, so split the objects out so the struct
device is no longer embedded and do what fbdev does and just allocate
and remove the sysfs inodes separately.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Add support for TDA998x output via the slave driver in the kernel.
Reviewed-by: NRob Clark <robdclark@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: NRob Clark <robdclark@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds ARGB hardware cursor support to the DRM driver for the
Marvell Armada SoCs.  ARGB cursors are supported at either 32x64 or
64x32 resolutions.
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: NRob Clark <robdclark@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This is useful with the follow-up patch that frobs
dev_priv->vbt.edp_bpp, and the value no longer comes directly from
VBT.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

In

Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jun 5 13:34:23 2013 +0200

    drm/i915: consolidate pch pll enable sequence

I've removed all the code from this if block, but somehow forgotten to
kill the block itself.
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

hw designers decided to change the CRC registers and coalesce them all
into one. Otherwise nothing changed. I've opted for a new hsw_ version
to grab the crc sample since hsw+1 will have the same crc registers,
but different interrupt source registers. So this little helper
function will come handy there.

Also refactor the display error handler with a neat pipe loop.

v2: Use for_each_pipe.
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

We've set up all files, but removed only those for which we have a
pipe. Which leaves the one for pipe C on machines with less than 2
pipes, breaking module reload.

v2: We can't get at the drm device this early (wtf), so just register
all the files and also remove them all again.
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

This avoids a spurious spurious interrupt warning.
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

Suggested by Ville.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

We enable the interrupt unconditionally and only control it
through the enable bit in the CRC control register.

v2: Extract per-platform helpers to compute the register values.
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

Also add a new _PIPE_INC macro which takes an base plus increment.
Much less likely to botch the job by missing an s/A/B/ somewhere.

v2: They've moved the bitfield. Argh!
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

The ringbuffer update logic should always be the same, but different
platforms have different amounts of CRC registers. Hence extract it.
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

Failed to properly test this.
Reported-by: NChris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: NChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

The HDMI audio expects HDMI pixel clock to be set in the audio
configuration. We've currently just set 0, using 25.2 / 1.001 kHz
frequency, which fails with some modes.

v2: Now with a commit message.

Reference: http://mid.gmane.org/CAGpEb3Ep1LRZETPxHGRfBDqr5Ts2tAc8gCukWwugUf1U5NYv1g@mail.gmail.com
Reference: http://mid.gmane.org/20130206213533.GA16367@hardeman.nuReported-by: NDavid Härdeman <david@hardeman.nu>
Reported-by: NJasper Smet <josbeir@gmail.com>
Tested-by: NJasper Smet <josbeir@gmail.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NRodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

This will be needed for setting the HDMI pixel clock for audio
config. No functional changes.

v2: Now with a commit message.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NRodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>