1. 19 1月, 2010 1 次提交
  2. 13 1月, 2010 1 次提交
    • P
      sh: Move over to dynamically allocated FPU context. · 0ea820cf
      Paul Mundt 提交于
      This follows the x86 xstate changes and implements a task_xstate slab
      cache that is dynamically sized to match one of hard FP/soft FP/FPU-less.
      
      This also tidies up and consolidates some of the SH-2A/SH-4 FPU
      fragmentation. Now fpu state restorers are commonly defined, with the
      init_fpu()/fpu_init() mess reworked to follow the x86 convention.
      The fpu_init() register initialization has been replaced by xstate setup
      followed by writing out to hardware via the standard restore path.
      
      As init_fpu() now performs a slab allocation a secondary lighterweight
      restorer is also introduced for the context switch.
      
      In the future the DSP state will be rolled in here, too.
      
      More work remains for math emulation and the SH-5 FPU, which presently
      uses its own special (UP-only) interfaces.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0ea820cf
  3. 12 1月, 2010 1 次提交
  4. 05 1月, 2010 1 次提交
    • P
      sh: Abstracted SH-4A UBC support on hw-breakpoint core. · 4352fc1b
      Paul Mundt 提交于
      This is the next big chunk of hw_breakpoint support. This decouples
      the SH-4A support from the core and moves it out in to its own stub,
      following many of the conventions established with the perf events
      layering.
      
      In addition to extending SH-4A support to encapsulate the remainder
      of the UBC channels, clock framework support for handling the UBC
      interface clock is added as well, allowing for dynamic clock gating.
      
      This also fixes up a regression introduced by the SIGTRAP handling that
      broke the ksym_tracer, to the extent that the current support works well
      with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will
      follow in turn.
      
      With this in place, the remaining UBC variants (SH-2A and SH-4) can now
      be trivially plugged in.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      4352fc1b
  5. 08 12月, 2009 1 次提交
    • P
      sh: hw-breakpoints: Add preliminary support for SH-4A UBC. · 09a07294
      Paul Mundt 提交于
      This adds preliminary support for the SH-4A UBC to the hw-breakpoints API.
      Presently only a single channel is implemented, and the ptrace interface
      still needs to be converted. This is the first step to cleaning up the
      long-standing UBC mess, making the UBC more generally accessible, and
      finally making it SMP safe.
      
      An additional abstraction will be layered on top of this as with the perf
      events code to permit the various CPU families to wire up support for
      their own specific UBCs, as many variations exist.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      09a07294
  6. 24 11月, 2009 1 次提交
    • S
      sh: Minor optimisations to FPU handling · d3ea9fa0
      Stuart Menefy 提交于
      A number of small optimisations to FPU handling, in particular:
      
       - move the task USEDFPU flag from the thread_info flags field (which
         is accessed asynchronously to the thread) to a new status field,
         which is only accessed by the thread itself. This allows locking to
         be removed in most cases, or can be reduced to a preempt_lock().
         This mimics the i386 behaviour.
      
       - move the modification of regs->sr and thread_info->status flags out
         of save_fpu() to __unlazy_fpu(). This gives the compiler a better
         chance to optimise things, as well as making save_fpu() symmetrical
         with restore_fpu() and init_fpu().
      
       - implement prepare_to_copy(), so that when creating a thread, we can
         unlazy the FPU prior to copying the thread data structures.
      
      Also make sure that the FPU is disabled while in the kernel, in
      particular while booting, and for newly created kernel threads,
      
      In a very artificial benchmark, the execution time for 2500000
      context switches was reduced from 50 to 45 seconds.
      Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      d3ea9fa0
  7. 04 4月, 2009 1 次提交
    • M
      sh: Fix up DSP context save/restore. · 01ab1039
      Michael Trimarchi 提交于
      There were a number of issues with the DSP context save/restore code,
      mostly left-over relics from when it was introduced on SH3-DSP with
      little follow-up testing, resulting in things like task_pt_dspregs()
      referencing incorrect state on the stack.
      
      This follows the MIPS convention of tracking the DSP state in the
      thread_struct and handling the state save/restore in switch_to() and
      finish_arch_switch() respectively. The regset interface is also updated,
      which allows us to finally be rid of task_pt_dspregs() and the special
      cased task_pt_regs().
      Signed-off-by: NMichael Trimarchi <michael@evidence.eu.com>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      01ab1039
  8. 27 2月, 2009 1 次提交
  9. 29 1月, 2009 1 次提交
  10. 22 12月, 2008 3 次提交
  11. 17 9月, 2008 1 次提交
  12. 12 9月, 2008 1 次提交
  13. 08 9月, 2008 1 次提交
  14. 29 7月, 2008 2 次提交
  15. 28 7月, 2008 2 次提交
  16. 26 3月, 2008 1 次提交
  17. 09 2月, 2008 1 次提交
  18. 28 1月, 2008 4 次提交
  19. 07 11月, 2007 1 次提交
    • P
      sh: Kill off the remaining ST40 cruft. · f9669187
      Paul Mundt 提交于
      The ST40 stuff in-tree hasn't built for some time, and hasn't been
      updated for over 3 years. ST maintains their own out-of-tree changes
      and rebases occasionally, and that's ultimately where all of the ST40
      users go anyways.
      
      In order for the ST40 code to be brought up to date most of the stuff
      removed in this changeset would have to be rewritten anyways, so there's
      very little benefit in keeping the remnants around either.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      f9669187
  20. 30 10月, 2007 1 次提交
  21. 27 9月, 2007 2 次提交
  22. 21 9月, 2007 2 次提交
  23. 26 7月, 2007 1 次提交
  24. 25 7月, 2007 1 次提交
  25. 20 6月, 2007 1 次提交
  26. 11 6月, 2007 1 次提交
  27. 08 6月, 2007 1 次提交
  28. 07 5月, 2007 1 次提交
  29. 13 2月, 2007 2 次提交
  30. 12 12月, 2006 1 次提交