- 06 8月, 2013 3 次提交
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由 Kuninori Morimoto 提交于
NFS detail settings like "nfsroot=,rsize=4096,wsize=4096" are no longer needed Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Now that Ether support has been added to the lager board it is possible to use nfsroot. This configuration is in line with that of other shmobile boards. Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 05 8月, 2013 1 次提交
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由 Laurent Pinchart 提交于
The shmobile DT files available in the kernel are reference implementations intended to be used as sample code, as well as for development. As such, it makes sense to mount the root file system in read/write mode by default. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 31 7月, 2013 3 次提交
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由 Magnus Damm 提交于
Add PMU information to emev2.dtsi. With this included KZM9D DT reference may use the PMU. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add PMU information to sh73a0.dtsi. With this included KZM9G DT reference may use the PMU. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add PMU information to r8a7740.dtsi. With this included Armadillo800eva DT reference may use the PMU. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 30 7月, 2013 3 次提交
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由 Lee Jones 提交于
Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
This is in preparation for converting the marzen board to use DT_MACHINE_START. Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
PFC pinctrl configuration can now be performed via DT. Update ape6evm-reference to use this. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 26 7月, 2013 1 次提交
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由 Kuninori Morimoto 提交于
This patch adds a sample DT-based Bock-W "reference" implementation. The use of platform-specific C-code should be avoided with this configuration as much as possible. This patch adds new r8a7778_add_dt_devices() which was same stance of r8a7790_add_dt_devices() Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 23 7月, 2013 1 次提交
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由 Laurent Pinchart 提交于
LED6 to LED8 are GPIO LEDs. Add corresponding DT nodes. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 17 7月, 2013 11 次提交
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由 Simon Horman 提交于
This is sufficient to allow boot of the Lager board with a console without boards-lager.c compiled into the kernel. This is an example of a minimal but still useful initialisation of the board using DT as much as possible. As such it is the same as the boot of Lager that can be achieved without a board file. The intention of adding this file is to facilitate further work to allow board specific devices to be initialised via DT. Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
Add CPUFreq support to ape6evm-reference, using a max8973 regulator, that is supplying V_DVFS for the 4 CA15 cores on r8a73a4. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
This patch adds a sample DT-based APE6EVM "reference" implementation. The use of platform-specific C-code should be avoided with this configuration as much as possible. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add support for the SMSC ethernet controller found on the KZM9D board to the KZM9D DT Reference code. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add a DT reference implementation for the KZM9D board. Only DT devices are used in this case. UART, STI, GPIO and SMP / GIC are all provided by emev2.dtsi. There is still a board specific C file used for enabling legacy SH clocks. This file will be removed after we have moved over to common clocks. Signed-off-by: NMagnus Damm <damm@opensource.se> [horms+renesas@verge.net.au: Do not include trailing blank line in board-kzm9d-reference.c ] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
This adds DT templates for all MMCIF and SDHI controllers on r8a7790. They are added with status="disabled". To use them platform-specific DTs have to enable the required ones. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
This adds DT templates for all MMCIF and SDHI controllers on r8a73a4. They are added with status="disabled". To use them platform-specific DTs have to enable the required ones. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add GIO0->GIO4 device nodes to the EMEV2 dtsi file. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Update the KZM9D DTS command line to remove following cruft: - console=tty0 - no graphic support upstream anyway - earlyprintk= - not supported by the 8250-em driver anyway - mem= - this is provided via DT anyway Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
This patch adds OPPs to the CA15 DT node and a max8973 DT node to support clock and voltage scaling, using the cpufreq-cpu0 CPUFreq driver. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
Add Device Tree nodes for the 9 I2C controllers on r8a73a4, compatible with the i2c-sh_mobile.c driver. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 7月, 2013 1 次提交
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由 Xianglong Du 提交于
On CSR SiRFprimaII/atlasVI, there is a programmable 16-bit divider (RTC_DIV) that divides the input 32.768KHz clock to the frequency that users need (E.g. 1 Hz). The divided real-time clock will be used to drive a 32-bit counter (RTC_COUNTER) that provides users with the actual time. In each cycle of the divided real-time clock, there is a Hertz interrupt generated to the RISC. Users can also configure an alarm (RTC_ALARM). When RTC_COUNTER matches the alarm, there will be an alarm interrupt generated to the RISC. The system RTC can generate an alarm wake-up signal to notify the power controller to wake up from power saving mode. Signed-off-by: NXianglong Du <Xianglong.Du@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Cc: Jingoo Han <jg1.han@samsung.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 03 7月, 2013 1 次提交
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由 Stephen Warren 提交于
Commit 4c94c8b5 "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 28 6月, 2013 1 次提交
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由 Rahul Sharma 提交于
This patch renames the combatible strings for hdmi, mixer, ddc and hdmiphy. It follows the convention of using compatible string which represent the SoC in which the IP was added for the first time. Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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- 27 6月, 2013 5 次提交
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由 Fabio Estevam 提交于
Instead of using a GPIO to turn on/off the CAN transceiver, it is better to use a regulator as some systems may use a PMIC to power the CAN transceiver. Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
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由 Linus Walleij 提交于
This alters the local side address of the iospace to zero, non prefetchable memory local side address to 0x00000000 and prefetchable memory local side address to 0x10000000, so as to match the values actually poked in by the driver. Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Manjunathappa, Prakash 提交于
function-mask DT property is now a mask for a pin at each pin offset inside a given pincontrol register. Fix DA850 DT data to reflect this change. Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com> [nsekhar@ti.com: reword commit message for clarity] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Jingoo Han 提交于
This patch adds pcie controller node for exynos5440-ssdk5440, and also adds a phandle for pin controller node. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Jingoo Han 提交于
Exynos5440 has two PCIe controllers which can be used as root complex for PCIe interface. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 26 6月, 2013 9 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Nicolas Ferre 提交于
In previous version of SPI driver we where using different compatibility stings for finding SPI features. We are now using the IP revision information. So we stay with the unique compatibility string for this driver: "atmel,at91rm9200-spi". Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Srinivas Kandagatla 提交于
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with standard set-top box IPs. This patch adds initial support to B2020 with STiH415/416 with SBC_UART1 as console and a heard beat LED. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
B2000 board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM. This patch add initial support to b2000 with STiH415/416 with UART2 as console and a heard beat LED. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Srinivas Kandagatla 提交于
The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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