1. 04 11月, 2015 2 次提交
  2. 03 11月, 2015 2 次提交
  3. 02 11月, 2015 1 次提交
  4. 23 10月, 2015 2 次提交
  5. 22 10月, 2015 4 次提交
  6. 13 10月, 2015 3 次提交
    • V
      net: dsa: mv88e6xxx: fix hardware bridging · 5fe7f680
      Vivien Didelot 提交于
      Playing with the VLAN map of every port to implement "hardware bridging"
      in the 88E6352 driver was a hack until full 802.1Q was supported.
      
      Indeed with 802.1Q port mode "Disabled" or "Fallback", this feature is
      used to restrict which output ports an input port can egress frames to.
      
      A Linux bridge is an untagged VLAN. With full 802.1Q support, we don't
      need this hack anymore and can use the "Secure" strict 802.1Q port mode.
      
      With this mode, the port-based VLAN map still needs to be configured,
      but all the logic is VTU-centric. This means that the switch only cares
      about rules described in its hardware VLAN table, which is exactly what
      Linux bridge expects and what we want.
      
      Note also that the hardware bridging was broken with the previous
      flexible "Fallback" 802.1Q port mode. Here's an example:
      
      Port0 and Port1 belong to the same bridge. If Port0 sends crafted tagged
      frames with VID 200 to Port1, Port1 receives it. Even if Port1 is in
      hardware VLAN 200, but not Port0, Port1 will still receive it, because
      Fallback mode doesn't care about invalid VID or non-member source port.
      Signed-off-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5fe7f680
    • V
      net: dsa: mv88e6xxx: do not support per-port FID · f02bdffc
      Vivien Didelot 提交于
      Since we configure a switch chip through a Linux bridge, and a bridge is
      implemented as a VLAN, there is no need for per-port FID anymore.
      
      This patch gets rid of this and simplifies the driver code since we can
      now directly map all 4095 FIDs available to all VLANs.
      Signed-off-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f02bdffc
    • V
      net: dsa: mv88e6xxx: bridges do not need an FID · ede8098d
      Vivien Didelot 提交于
      With 88E6352 and similar switch chips, each port has a map to restrict
      which output port this input port can egress frames to.
      
      The current driver code implements hardware bridging using this feature,
      and assigns to a bridge group the FID of its first member.
      
      Now that 802.1Q is fully implemented in this driver, a Linux bridge
      which is a simple untagged VLAN, already gets its own FID.
      
      This patch gets rid of the per-bridge FID and explicits the usage of the
      port based VLAN map feature.
      Signed-off-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ede8098d
  7. 11 10月, 2015 3 次提交
  8. 07 10月, 2015 1 次提交
  9. 30 9月, 2015 2 次提交
  10. 23 9月, 2015 1 次提交
    • R
      net: dsa: actually force the speed on the CPU port · 53adc9e8
      Russell King 提交于
      Commit 54d792f2 ("net: dsa: Centralise global and port setup
      code into mv88e6xxx.") merged in the 4.2 merge window broke the link
      speed forcing for the CPU port of Marvell DSA switches.  The original
      code was:
      
              /* MAC Forcing register: don't force link, speed, duplex
               * or flow control state to any particular values on physical
               * ports, but force the CPU port and all DSA ports to 1000 Mb/s
               * full duplex.
               */
              if (dsa_is_cpu_port(ds, p) || ds->dsa_port_mask & (1 << p))
                      REG_WRITE(addr, 0x01, 0x003e);
              else
                      REG_WRITE(addr, 0x01, 0x0003);
      
      but the new code does a read-modify-write:
      
                      reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL);
                      if (dsa_is_cpu_port(ds, port) ||
                          ds->dsa_port_mask & (1 << port)) {
                              reg |= PORT_PCS_CTRL_FORCE_LINK |
                                      PORT_PCS_CTRL_LINK_UP |
                                      PORT_PCS_CTRL_DUPLEX_FULL |
                                      PORT_PCS_CTRL_FORCE_DUPLEX;
                              if (mv88e6xxx_6065_family(ds))
                                      reg |= PORT_PCS_CTRL_100;
                              else
                                      reg |= PORT_PCS_CTRL_1000;
      
      The link speed in the PCS control register is a two bit field.  Forcing
      the link speed in this way doesn't ensure that the bit field is set to
      the correct value - on the hardware I have here, the speed bitfield
      remains set to 0x03, resulting in the speed not being forced to gigabit.
      
      We must clear both bits before forcing the link speed.
      
      Fixes: 54d792f2 ("net: dsa: Centralise global and port setup code into mv88e6xxx.")
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Acked-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      53adc9e8
  11. 16 9月, 2015 7 次提交
  12. 01 9月, 2015 3 次提交
  13. 24 8月, 2015 1 次提交
    • V
      net: dsa: mv88e6xxx: set 802.1Q mode to Fallback · f5117ce4
      Vivien Didelot 提交于
      The current Secure port mode requires the port-based VLANs to also be
      valid in the 802.1Q VLAN Table Unit. The current hardware bridging
      support only configures the port-based VLANs, thus is broken.
      
      A new patchset is required to adapt the hardware bridging code to fully
      support the Secure port mode.
      
      In the meantime, change the 802.1Q mode of every ports to Fallback,
      which filtering is more permissive, and doesn't add this restriction to
      handle port-based and tagged-based VLANs.
      
      Fixes: 8efdda4a ("net: dsa: mv88e6xxx: use port 802.1Q mode Secure")
      Signed-off-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f5117ce4
  14. 19 8月, 2015 2 次提交
  15. 14 8月, 2015 6 次提交